doc(port_riscv): typo

yvt · yvt · commit 13b72c852bfd · 2022-01-18T12:27:22.000+09:00
diff --git a/src/r3_port_riscv/src/plic/imp.rs b/src/r3_port_riscv/src/plic/imp.rs
@@ -30,7 +30,7 @@ pub fn init<Traits: Plic>() {
         plic_regs.interrupt_enable[ctx][i].set(0);
     }
 
-    // Change the priority thread of the current context
+    // Change the priority threshold of the current context
     // to accept all interrupts
     plic_regs.ctxs[Traits::CONTEXT].priority_threshold.set(0);
 }

Original file line number	Diff line number	Diff line change
`@@ -30,7 +30,7 @@ pub fn init<Traits: Plic>() {`
`30`	`30`	`plic_regs.interrupt_enable[ctx][i].set(0);`
`31`	`31`	`}`
`32`	`32`
`33`		`- // Change the priority thread of the current context`
	`33`	`+ // Change the priority threshold of the current context`
`34`	`34`	`// to accept all interrupts`
`35`	`35`	`plic_regs.ctxs[Traits::CONTEXT].priority_threshold.set(0);`
`36`	`36`	`}`