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1 parent 66955af commit 7b66016Copy full SHA for 7b66016
asm/inline.rs
@@ -55,6 +55,7 @@ pub unsafe fn __delay(cyc: u32) {
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// The loop will normally take 3 to 4 CPU cycles per iteration, but superscalar cores
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// (eg. Cortex-M7) can potentially do it in 2, so we use that as the lower bound, since delaying
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// for more cycles is okay.
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+ // Add 1 to prevent an integer underflow which would cause a long freeze
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let real_cyc = 1 + cyc / 2;
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asm!(
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// Use local labels to avoid R_ARM_THM_JUMP8 relocations which fail on thumbv6m.
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