@@ -4,7 +4,7 @@ use volatile_register::RW;
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#[ cfg( not( armv6m) ) ]
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use volatile_register:: { RO , WO } ;
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- use crate :: interrupt:: Nr ;
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+ use crate :: interrupt:: InterruptNumber ;
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use crate :: peripheral:: NVIC ;
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/// Register block
@@ -86,9 +86,9 @@ impl NVIC {
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#[ inline]
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pub fn request < I > ( & mut self , interrupt : I )
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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unsafe {
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self . stir . write ( u32:: from ( nr) ) ;
@@ -99,9 +99,9 @@ impl NVIC {
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#[ inline]
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pub fn mask < I > ( interrupt : I )
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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// NOTE(unsafe) this is a write to a stateless register
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unsafe { ( * Self :: ptr ( ) ) . icer [ usize:: from ( nr / 32 ) ] . write ( 1 << ( nr % 32 ) ) }
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}
@@ -112,9 +112,9 @@ impl NVIC {
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#[ inline]
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pub unsafe fn unmask < I > ( interrupt : I )
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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// NOTE(ptr) this is a write to a stateless register
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( * Self :: ptr ( ) ) . iser [ usize:: from ( nr / 32 ) ] . write ( 1 << ( nr % 32 ) )
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}
@@ -127,11 +127,11 @@ impl NVIC {
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#[ inline]
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pub fn get_priority < I > ( interrupt : I ) -> u8
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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#[ cfg( not( armv6m) ) ]
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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// NOTE(unsafe) atomic read with no side effects
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unsafe { ( * Self :: ptr ( ) ) . ipr [ usize:: from ( nr) ] . read ( ) }
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}
@@ -150,9 +150,9 @@ impl NVIC {
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#[ inline]
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pub fn is_active < I > ( interrupt : I ) -> bool
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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let mask = 1 << ( nr % 32 ) ;
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// NOTE(unsafe) atomic read with no side effects
@@ -163,9 +163,9 @@ impl NVIC {
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#[ inline]
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pub fn is_enabled < I > ( interrupt : I ) -> bool
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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let mask = 1 << ( nr % 32 ) ;
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// NOTE(unsafe) atomic read with no side effects
@@ -176,9 +176,9 @@ impl NVIC {
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#[ inline]
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pub fn is_pending < I > ( interrupt : I ) -> bool
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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let mask = 1 << ( nr % 32 ) ;
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// NOTE(unsafe) atomic read with no side effects
@@ -189,9 +189,9 @@ impl NVIC {
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#[ inline]
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pub fn pend < I > ( interrupt : I )
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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// NOTE(unsafe) atomic stateless write; ICPR doesn't store any state
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unsafe { ( * Self :: ptr ( ) ) . ispr [ usize:: from ( nr / 32 ) ] . write ( 1 << ( nr % 32 ) ) }
@@ -212,11 +212,11 @@ impl NVIC {
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#[ inline]
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pub unsafe fn set_priority < I > ( & mut self , interrupt : I , prio : u8 )
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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#[ cfg( not( armv6m) ) ]
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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self . ipr [ usize:: from ( nr) ] . write ( prio)
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}
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@@ -235,9 +235,9 @@ impl NVIC {
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#[ inline]
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pub fn unpend < I > ( interrupt : I )
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- let nr = interrupt. nr ( ) ;
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+ let nr = interrupt. into ( ) ;
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// NOTE(unsafe) atomic stateless write; ICPR doesn't store any state
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unsafe { ( * Self :: ptr ( ) ) . icpr [ usize:: from ( nr / 32 ) ] . write ( 1 << ( nr % 32 ) ) }
@@ -247,17 +247,17 @@ impl NVIC {
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#[ inline]
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fn ipr_index < I > ( interrupt : & I ) -> usize
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- usize:: from ( interrupt. nr ( ) ) / 4
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+ usize:: from ( interrupt. into ( ) ) / 4
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}
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#[ cfg( armv6m) ]
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#[ inline]
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fn ipr_shift < I > ( interrupt : & I ) -> usize
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where
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- I : Nr ,
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+ I : InterruptNumber ,
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{
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- ( usize:: from ( interrupt. nr ( ) ) % 4 ) * 8
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+ ( usize:: from ( interrupt. into ( ) ) % 4 ) * 8
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}
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}
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