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switch to a whitelist based on platform
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library/core/src/num/f32.rs

+11-8
Original file line numberDiff line numberDiff line change
@@ -1017,12 +1017,17 @@ impl f32 {
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#[unstable(feature = "num_midpoint", issue = "110840")]
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pub fn midpoint(self, other: f32) -> f32 {
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cfg_if! {
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if #[cfg(all(target_arch = "arm", target_pointer_width = "32",
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not(target_feature = "vfp2")))] {
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// some 32-bit ARM architectures don't have native double-precision floats
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// so fall back to a similar algorithm as in f64, but using f32
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// This should only differ in the specific NaNs reported.
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1020+
if #[cfg(any(
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target_arch = "x86_64",
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target_arch = "aarch64",
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all(any(target_arch="riscv32", target_arch= "riscv64"), target_feature="d"),
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all(target_arch = "arm", target_feature="vfp2"),
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))] {
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// whitelist the faster implementation to targets that have known good 64-bit float
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// implementations. Falling back to the branchy code on targets that don't have
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// 64-bit hardware floats or buggy implementations.
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((f64::from(self) + f64::from(other)) / 2.0) as f32
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} else {
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const LO: f32 = f32::MIN_POSITIVE * 2.;
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const HI: f32 = f32::MAX / 2.;
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@@ -1043,8 +1048,6 @@ impl f32 {
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// Not safe to halve a and b
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(a / 2.) + (b / 2.)
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}
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} else {
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((f64::from(self) + f64::from(other)) / 2.0) as f32
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}
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}
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}

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