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Commit 1c105a0

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Chen Zheng
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[NFC][testcases] add testcases for folding srem whose operands are negatived.
Finish same optimization for add instruction in D49216 and sdiv instruction in D49382. This patch is for srem instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337270 91177308-0d34-0410-b5e6-96231b3b80d8
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test/Transforms/InstSimplify/srem.ll

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; RUN: opt < %s -instsimplify -S | FileCheck %s
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define i32 @negated_operand(i32 %x) {
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; CHECK-LABEL: @negated_operand(
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; CHECK-NEXT: [[NEGX:%.*]] = sub i32 0, [[X:%.*]]
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; CHECK-NEXT: [[REM:%.*]] = srem i32 [[NEGX]], [[X]]
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; CHECK-NEXT: ret i32 [[REM]]
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;
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%negx = sub i32 0, %x
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%rem = srem i32 %negx, %x
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ret i32 %rem
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}
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define <2 x i32> @negated_operand_commute_vec(<2 x i32> %x) {
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; CHECK-LABEL: @negated_operand_commute_vec(
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; CHECK-NEXT: [[NEGX:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
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; CHECK-NEXT: [[REM:%.*]] = srem <2 x i32> [[NEGX]], [[X]]
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; CHECK-NEXT: ret <2 x i32> [[REM]]
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;
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%negx = sub nsw <2 x i32> zeroinitializer, %x
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%rem = srem <2 x i32> %negx, %x
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ret <2 x i32> %rem
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}
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define i32 @knownnegation(i32 %x, i32 %y) {
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; CHECK-LABEL: @knownnegation(
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; CHECK-NEXT: [[XY:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[YX:%.*]] = sub nsw i32 [[Y]], [[X]]
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; CHECK-NEXT: [[REM:%.*]] = srem i32 [[XY]], [[YX]]
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; CHECK-NEXT: ret i32 [[REM]]
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;
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%xy = sub nsw i32 %x, %y
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%yx = sub nsw i32 %y, %x
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%rem = srem i32 %xy, %yx
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ret i32 %rem
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}
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define <2 x i32> @knownnegation_commute_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @knownnegation_commute_vec(
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; CHECK-NEXT: [[XY:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[YX:%.*]] = sub nsw <2 x i32> [[Y]], [[X]]
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; CHECK-NEXT: [[REM:%.*]] = srem <2 x i32> [[XY]], [[YX]]
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; CHECK-NEXT: ret <2 x i32> [[REM]]
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;
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%xy = sub nsw <2 x i32> %x, %y
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%yx = sub nsw <2 x i32> %y, %x
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%rem = srem <2 x i32> %xy, %yx
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ret <2 x i32> %rem
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}

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