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Merge pull request #79 from parched/rust-smulo
Fix signed multiplication with overflow
2 parents 1ef3b91 + 15d7c54 commit 5edb164

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+18
-2
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+18
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lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

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@@ -3481,11 +3481,11 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
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// part.
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unsigned LoSize = VT.getSizeInBits();
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SDValue HiLHS =
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DAG.getNode(ISD::SRA, dl, VT, RHS,
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DAG.getNode(ISD::SRA, dl, VT, LHS,
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DAG.getConstant(LoSize - 1, dl,
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TLI.getPointerTy(DAG.getDataLayout())));
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SDValue HiRHS =
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DAG.getNode(ISD::SRA, dl, VT, LHS,
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DAG.getNode(ISD::SRA, dl, VT, RHS,
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DAG.getConstant(LoSize - 1, dl,
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TLI.getPointerTy(DAG.getDataLayout())));
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@@ -0,0 +1,16 @@
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; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s
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define i1 @signed_multiplication_did_overflow(i32, i32) {
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; CHECK-LABEL: signed_multiplication_did_overflow:
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entry-block:
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%2 = tail call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %0, i32 %1)
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%3 = extractvalue { i32, i1 } %2, 1
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ret i1 %3
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; CHECK: mov r2, r1
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; CHECK: asrs r1, r0, #31
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; CHECK: asrs r3, r2, #31
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; CHECK: bl __aeabi_lmul
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}
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declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32)

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