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[FastISel][AArch64] Cleanup constant materialization code. NFCI.
Cleanup and prepare constant materialization code for future commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215582 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/AArch64/AArch64FastISel.cpp

Lines changed: 30 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -152,6 +152,7 @@ class AArch64FastISel : public FastISel {
152152
unsigned Emit_LSR_ri(MVT RetVT, unsigned Op0, bool Op0IsKill, uint64_t Imm);
153153
unsigned Emit_ASR_ri(MVT RetVT, unsigned Op0, bool Op0IsKill, uint64_t Imm);
154154

155+
unsigned AArch64MaterializeInt(const ConstantInt *CI, MVT VT);
155156
unsigned AArch64MaterializeFP(const ConstantFP *CFP, MVT VT);
156157
unsigned AArch64MaterializeGV(const GlobalValue *GV);
157158

@@ -213,28 +214,28 @@ unsigned AArch64FastISel::TargetMaterializeAlloca(const AllocaInst *AI) {
213214
return 0;
214215
}
215216

217+
unsigned AArch64FastISel::AArch64MaterializeInt(const ConstantInt *CI, MVT VT) {
218+
if (VT > MVT::i64)
219+
return 0;
220+
return FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
221+
}
222+
216223
unsigned AArch64FastISel::AArch64MaterializeFP(const ConstantFP *CFP, MVT VT) {
217224
if (VT != MVT::f32 && VT != MVT::f64)
218225
return 0;
219226

220227
const APFloat Val = CFP->getValueAPF();
221-
bool is64bit = (VT == MVT::f64);
228+
bool Is64Bit = (VT == MVT::f64);
222229

223230
// This checks to see if we can use FMOV instructions to materialize
224231
// a constant, otherwise we have to materialize via the constant pool.
225232
if (TLI.isFPImmLegal(Val, VT)) {
226-
int Imm;
227-
unsigned Opc;
228-
if (is64bit) {
229-
Imm = AArch64_AM::getFP64Imm(Val);
230-
Opc = AArch64::FMOVDi;
231-
} else {
232-
Imm = AArch64_AM::getFP32Imm(Val);
233-
Opc = AArch64::FMOVSi;
234-
}
233+
int Imm = Is64Bit ? AArch64_AM::getFP64Imm(Val)
234+
: AArch64_AM::getFP32Imm(Val);
235+
unsigned Opc = Is64Bit ? AArch64::FMOVDi : AArch64::FMOVSi;
235236
unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
236237
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
237-
.addImm(Imm);
238+
.addImm(Imm);
238239
return ResultReg;
239240
}
240241

@@ -244,16 +245,17 @@ unsigned AArch64FastISel::AArch64MaterializeFP(const ConstantFP *CFP, MVT VT) {
244245
if (Align == 0)
245246
Align = DL.getTypeAllocSize(CFP->getType());
246247

247-
unsigned Idx = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align);
248+
unsigned CPI = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align);
248249
unsigned ADRPReg = createResultReg(&AArch64::GPR64commonRegClass);
249250
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
250-
ADRPReg).addConstantPoolIndex(Idx, 0, AArch64II::MO_PAGE);
251+
ADRPReg)
252+
.addConstantPoolIndex(CPI, 0, AArch64II::MO_PAGE);
251253

252-
unsigned Opc = is64bit ? AArch64::LDRDui : AArch64::LDRSui;
254+
unsigned Opc = Is64Bit ? AArch64::LDRDui : AArch64::LDRSui;
253255
unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
254256
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
255-
.addReg(ADRPReg)
256-
.addConstantPoolIndex(Idx, 0, AArch64II::MO_PAGEOFF | AArch64II::MO_NC);
257+
.addReg(ADRPReg)
258+
.addConstantPoolIndex(CPI, 0, AArch64II::MO_PAGEOFF | AArch64II::MO_NC);
257259
return ResultReg;
258260
}
259261

@@ -280,25 +282,26 @@ unsigned AArch64FastISel::AArch64MaterializeGV(const GlobalValue *GV) {
280282
// ADRP + LDRX
281283
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
282284
ADRPReg)
283-
.addGlobalAddress(GV, 0, AArch64II::MO_GOT | AArch64II::MO_PAGE);
285+
.addGlobalAddress(GV, 0, AArch64II::MO_GOT | AArch64II::MO_PAGE);
284286

285287
ResultReg = createResultReg(&AArch64::GPR64RegClass);
286288
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::LDRXui),
287289
ResultReg)
288-
.addReg(ADRPReg)
289-
.addGlobalAddress(GV, 0, AArch64II::MO_GOT | AArch64II::MO_PAGEOFF |
290-
AArch64II::MO_NC);
290+
.addReg(ADRPReg)
291+
.addGlobalAddress(GV, 0, AArch64II::MO_GOT | AArch64II::MO_PAGEOFF |
292+
AArch64II::MO_NC);
291293
} else {
292294
// ADRP + ADDX
293295
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
294-
ADRPReg).addGlobalAddress(GV, 0, AArch64II::MO_PAGE);
296+
ADRPReg)
297+
.addGlobalAddress(GV, 0, AArch64II::MO_PAGE);
295298

296299
ResultReg = createResultReg(&AArch64::GPR64spRegClass);
297300
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADDXri),
298301
ResultReg)
299-
.addReg(ADRPReg)
300-
.addGlobalAddress(GV, 0, AArch64II::MO_PAGEOFF | AArch64II::MO_NC)
301-
.addImm(0);
302+
.addReg(ADRPReg)
303+
.addGlobalAddress(GV, 0, AArch64II::MO_PAGEOFF | AArch64II::MO_NC)
304+
.addImm(0);
302305
}
303306
return ResultReg;
304307
}
@@ -311,8 +314,9 @@ unsigned AArch64FastISel::TargetMaterializeConstant(const Constant *C) {
311314
return 0;
312315
MVT VT = CEVT.getSimpleVT();
313316

314-
// FIXME: Handle ConstantInt.
315-
if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C))
317+
if (const auto *CI = dyn_cast<ConstantInt>(C))
318+
return AArch64MaterializeInt(CI, VT);
319+
else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C))
316320
return AArch64MaterializeFP(CFP, VT);
317321
else if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
318322
return AArch64MaterializeGV(GV);

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