cleanup: remove support for 3DNow! cpu features

In llvm/llvm-project@f0eb558 all
support for 3DNow! intrinsics and instructions. Per the commit message
there, only AMD chips between 1998 and 2011 or so actually supported
these instructions, and they were effectively replaced by SSE which was
available on many more chips. I'd be very surprised if anyone had ever
used these from Rust.

Author: durin42

compiler/rustc_codegen_gcc/src/intrinsic/archs.rs

@@ -7210,29 +7210,6 @@ match name {
     "llvm.ve.vl.xorm.MMM" => "__builtin_ve_vl_xorm_MMM",
     "llvm.ve.vl.xorm.mmm" => "__builtin_ve_vl_xorm_mmm",
     // x86
-    "llvm.x86.3dnow.pavgusb" => "__builtin_ia32_pavgusb",
-    "llvm.x86.3dnow.pf2id" => "__builtin_ia32_pf2id",
-    "llvm.x86.3dnow.pfacc" => "__builtin_ia32_pfacc",
-    "llvm.x86.3dnow.pfadd" => "__builtin_ia32_pfadd",
-    "llvm.x86.3dnow.pfcmpeq" => "__builtin_ia32_pfcmpeq",
-    "llvm.x86.3dnow.pfcmpge" => "__builtin_ia32_pfcmpge",
-    "llvm.x86.3dnow.pfcmpgt" => "__builtin_ia32_pfcmpgt",
-    "llvm.x86.3dnow.pfmax" => "__builtin_ia32_pfmax",
-    "llvm.x86.3dnow.pfmin" => "__builtin_ia32_pfmin",
-    "llvm.x86.3dnow.pfmul" => "__builtin_ia32_pfmul",
-    "llvm.x86.3dnow.pfrcp" => "__builtin_ia32_pfrcp",
-    "llvm.x86.3dnow.pfrcpit1" => "__builtin_ia32_pfrcpit1",
-    "llvm.x86.3dnow.pfrcpit2" => "__builtin_ia32_pfrcpit2",
-    "llvm.x86.3dnow.pfrsqit1" => "__builtin_ia32_pfrsqit1",
-    "llvm.x86.3dnow.pfrsqrt" => "__builtin_ia32_pfrsqrt",
-    "llvm.x86.3dnow.pfsub" => "__builtin_ia32_pfsub",
-    "llvm.x86.3dnow.pfsubr" => "__builtin_ia32_pfsubr",
-    "llvm.x86.3dnow.pi2fd" => "__builtin_ia32_pi2fd",
-    "llvm.x86.3dnow.pmulhrw" => "__builtin_ia32_pmulhrw",
-    "llvm.x86.3dnowa.pf2iw" => "__builtin_ia32_pf2iw",
-    "llvm.x86.3dnowa.pfnacc" => "__builtin_ia32_pfnacc",
-    "llvm.x86.3dnowa.pfpnacc" => "__builtin_ia32_pfpnacc",
-    "llvm.x86.3dnowa.pi2fw" => "__builtin_ia32_pi2fw",
     "llvm.x86.aadd32" => "__builtin_ia32_aadd32",
     "llvm.x86.aadd64" => "__builtin_ia32_aadd64",
     "llvm.x86.aand32" => "__builtin_ia32_aand32",

compiler/rustc_target/src/spec/targets/x86_64_unknown_none.rs

@@ -18,9 +18,7 @@ pub fn target() -> Target {
         relro_level: RelroLevel::Full,
         linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
         linker: Some("rust-lld".into()),
-        features:
-            "-mmx,-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-3dnow,-3dnowa,-avx,-avx2,+soft-float"
-                .into(),
+        features: "-mmx,-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-avx,-avx2,+soft-float".into(),
         supported_sanitizers: SanitizerSet::KCFI | SanitizerSet::KERNELADDRESS,
         disable_redzone: true,
         panic_strategy: PanicStrategy::Abort,