Use more accurate ELF flags on MIPS

Author: smrobtzz

compiler/rustc_codegen_ssa/src/back/metadata.rs

@@ -270,45 +270,43 @@ pub(super) fn elf_os_abi(sess: &Session) -> u8 {
 
 pub(super) fn elf_e_flags(architecture: Architecture, sess: &Session) -> u32 {
     match architecture {
-        Architecture::Mips => {
-            let arch = match sess.target.options.cpu.as_ref() {
+        Architecture::Mips | Architecture::Mips64 | Architecture::Mips64_N32 => {
+            let mut e_flags = match sess.target.options.cpu.as_ref() {
                 "mips1" => elf::EF_MIPS_ARCH_1,
                 "mips2" => elf::EF_MIPS_ARCH_2,
                 "mips3" => elf::EF_MIPS_ARCH_3,
                 "mips4" => elf::EF_MIPS_ARCH_4,
                 "mips5" => elf::EF_MIPS_ARCH_5,
-                s if s.contains("r6") => elf::EF_MIPS_ARCH_32R6,
+                "mips32r2" => elf::EF_MIPS_ARCH_32R2,
+                "mips32r6" => elf::EF_MIPS_ARCH_32R6,
+                "mips64r2" => elf::EF_MIPS_ARCH_64R2,
+                "mips64r6" => elf::EF_MIPS_ARCH_64R6,
                 _ => elf::EF_MIPS_ARCH_32R2,
             };
 
-            let mut e_flags = elf::EF_MIPS_CPIC | arch;
-
-            // If the ABI is explicitly given, use it or default to O32.
+            // If the ABI is explicitly given, use it or default to O32 on 32-bit MIPS
+            // and N64 (which needs no extra flag) on 64-bit MIPS.
             match sess.target.options.llvm_abiname.to_lowercase().as_str() {
                 "n32" => e_flags |= elf::EF_MIPS_ABI2,
                 "o32" => e_flags |= elf::EF_MIPS_ABI_O32,
-                _ => e_flags |= elf::EF_MIPS_ABI_O32,
+                _ => {
+                    if architecture == Architecture::Mips {
+                        e_flags |= elf::EF_MIPS_ABI_O32
+                    }
+                }
             };
 
+            if !sess.target.options.features.contains("noabicalls") {
+                e_flags |= elf::EF_MIPS_CPIC;
+            }
             if sess.target.options.relocation_model != RelocModel::Static {
-                e_flags |= elf::EF_MIPS_PIC;
+                e_flags |= elf::EF_MIPS_PIC | elf::EF_MIPS_CPIC;
             }
             if sess.target.options.cpu.contains("r6") {
                 e_flags |= elf::EF_MIPS_NAN2008;
             }
             e_flags
         }
-        Architecture::Mips64 => {
-            // copied from `mips64el-linux-gnuabi64-gcc foo.c -c`
-            let e_flags = elf::EF_MIPS_CPIC
-                | elf::EF_MIPS_PIC
-                | if sess.target.options.cpu.contains("r6") {
-                    elf::EF_MIPS_ARCH_64R6 | elf::EF_MIPS_NAN2008
-                } else {
-                    elf::EF_MIPS_ARCH_64R2
-                };
-            e_flags
-        }
         Architecture::Riscv32 | Architecture::Riscv64 => {
             // Source: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/079772828bd10933d34121117a222b4cc0ee2200/riscv-elf.adoc
             let mut e_flags: u32 = 0x0;

compiler/rustc_target/src/spec/mod.rs

@@ -3567,7 +3567,14 @@ impl Target {
             "x86" => (Architecture::I386, None),
             "s390x" => (Architecture::S390x, None),
             "mips" | "mips32r6" => (Architecture::Mips, None),
-            "mips64" | "mips64r6" => (Architecture::Mips64, None),
+            "mips64" | "mips64r6" => (
+                if self.options.llvm_abiname.to_lowercase().as_str() == "n32" {
+                    Architecture::Mips64_N32
+                } else {
+                    Architecture::Mips64
+                },
+                None,
+            ),
             "x86_64" => (
                 if self.pointer_width == 32 {
                     Architecture::X86_64_X32