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1 parent c93ae0e commit 63a720cCopy full SHA for 63a720c
crates/core_arch/src/mips/msa.rs
@@ -498,8 +498,8 @@ extern "C" {
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fn msa_fexp2_w(a: v4f32, b: v4i32) -> v4f32;
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#[link_name = "llvm.mips.fexp2.d"]
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fn msa_fexp2_d(a: v2f64, b: v2i64) -> v2f64;
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- #[link_name = "llvm.mips.fexupl.w"]
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// FIXME: 16-bit floats
+ // #[link_name = "llvm.mips.fexupl.w"]
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// fn msa_fexupl_w(a: f16x8) -> v4f32;
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#[link_name = "llvm.mips.fexupl.d"]
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fn msa_fexupl_d(a: v4f32) -> v2f64;
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