@@ -6,6 +6,7 @@ use std::fmt;
6
6
def_reg_class ! {
7
7
S390x S390xInlineAsmRegClass {
8
8
reg,
9
+ reg_addr,
9
10
freg,
10
11
}
11
12
}
@@ -36,7 +37,7 @@ impl S390xInlineAsmRegClass {
36
37
arch : InlineAsmArch ,
37
38
) -> & ' static [ ( InlineAsmType , Option < Symbol > ) ] {
38
39
match ( self , arch) {
39
- ( Self :: reg, _) => types ! { _: I8 , I16 , I32 , I64 ; } ,
40
+ ( Self :: reg | Self :: reg_addr , _) => types ! { _: I8 , I16 , I32 , I64 ; } ,
40
41
( Self :: freg, _) => types ! { _: F32 , F64 ; } ,
41
42
}
42
43
}
@@ -45,19 +46,19 @@ impl S390xInlineAsmRegClass {
45
46
def_regs ! {
46
47
S390x S390xInlineAsmReg S390xInlineAsmRegClass {
47
48
r0: reg = [ "r0" ] ,
48
- r1: reg = [ "r1" ] ,
49
- r2: reg = [ "r2" ] ,
50
- r3: reg = [ "r3" ] ,
51
- r4: reg = [ "r4" ] ,
52
- r5: reg = [ "r5" ] ,
53
- r6: reg = [ "r6" ] ,
54
- r7: reg = [ "r7" ] ,
55
- r8: reg = [ "r8" ] ,
56
- r9: reg = [ "r9" ] ,
57
- r10: reg = [ "r10" ] ,
58
- r12: reg = [ "r12" ] ,
59
- r13: reg = [ "r13" ] ,
60
- r14: reg = [ "r14" ] ,
49
+ r1: reg, reg_addr = [ "r1" ] ,
50
+ r2: reg, reg_addr = [ "r2" ] ,
51
+ r3: reg, reg_addr = [ "r3" ] ,
52
+ r4: reg, reg_addr = [ "r4" ] ,
53
+ r5: reg, reg_addr = [ "r5" ] ,
54
+ r6: reg, reg_addr = [ "r6" ] ,
55
+ r7: reg, reg_addr = [ "r7" ] ,
56
+ r8: reg, reg_addr = [ "r8" ] ,
57
+ r9: reg, reg_addr = [ "r9" ] ,
58
+ r10: reg, reg_addr = [ "r10" ] ,
59
+ r12: reg, reg_addr = [ "r12" ] ,
60
+ r13: reg, reg_addr = [ "r13" ] ,
61
+ r14: reg, reg_addr = [ "r14" ] ,
61
62
f0: freg = [ "f0" ] ,
62
63
f1: freg = [ "f1" ] ,
63
64
f2: freg = [ "f2" ] ,
0 commit comments