@@ -893,36 +893,6 @@ trait EvalContextExtPriv<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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throw_unsup_format ! ( "unsupported `llvm.prefetch` type argument: {}" , ty) ;
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}
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}
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- // FIXME: Move these to an `arm` submodule.
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- "llvm.aarch64.isb" if this. tcx . sess . target . arch == "aarch64" => {
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- let [ arg] = this. check_shim ( abi, Abi :: Unadjusted , link_name, args) ?;
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- let arg = this. read_scalar ( arg) ?. to_i32 ( ) ?;
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- match arg {
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- // SY ("full system scope")
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- 15 => {
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- this. yield_active_thread ( ) ;
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- }
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- _ => {
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- throw_unsup_format ! ( "unsupported llvm.aarch64.isb argument {}" , arg) ;
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- }
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- }
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- }
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- "llvm.arm.hint" if this. tcx . sess . target . arch == "arm" => {
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- let [ arg] = this. check_shim ( abi, Abi :: Unadjusted , link_name, args) ?;
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- let arg = this. read_scalar ( arg) ?. to_i32 ( ) ?;
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- // Note that different arguments might have different target feature requirements.
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- match arg {
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- // YIELD
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- 1 => {
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- this. expect_target_feature_for_intrinsic ( link_name, "v6" ) ?;
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- this. yield_active_thread ( ) ;
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- }
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- _ => {
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- throw_unsup_format ! ( "unsupported llvm.arm.hint argument {}" , arg) ;
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- }
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- }
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- }
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-
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// Used to implement the x86 `_mm{,256,512}_popcnt_epi{8,16,32,64}` and wasm
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// `{i,u}8x16_popcnt` functions.
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name if name. starts_with ( "llvm.ctpop.v" ) => {
@@ -946,6 +916,7 @@ trait EvalContextExtPriv<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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}
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}
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+ // Target-specific shims
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name if name. starts_with ( "llvm.x86." )
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&& ( this. tcx . sess . target . arch == "x86"
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|| this. tcx . sess . target . arch == "x86_64" ) =>
@@ -954,6 +925,35 @@ trait EvalContextExtPriv<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
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this, link_name, abi, args, dest,
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) ;
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}
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+ // FIXME: Move these to an `arm` submodule.
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+ "llvm.aarch64.isb" if this. tcx . sess . target . arch == "aarch64" => {
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+ let [ arg] = this. check_shim ( abi, Abi :: Unadjusted , link_name, args) ?;
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+ let arg = this. read_scalar ( arg) ?. to_i32 ( ) ?;
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+ match arg {
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+ // SY ("full system scope")
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+ 15 => {
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+ this. yield_active_thread ( ) ;
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+ }
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+ _ => {
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+ throw_unsup_format ! ( "unsupported llvm.aarch64.isb argument {}" , arg) ;
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+ }
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+ }
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+ }
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+ "llvm.arm.hint" if this. tcx . sess . target . arch == "arm" => {
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+ let [ arg] = this. check_shim ( abi, Abi :: Unadjusted , link_name, args) ?;
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+ let arg = this. read_scalar ( arg) ?. to_i32 ( ) ?;
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+ // Note that different arguments might have different target feature requirements.
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+ match arg {
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+ // YIELD
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+ 1 => {
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+ this. expect_target_feature_for_intrinsic ( link_name, "v6" ) ?;
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+ this. yield_active_thread ( ) ;
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+ }
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+ _ => {
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+ throw_unsup_format ! ( "unsupported llvm.arm.hint argument {}" , arg) ;
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+ }
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+ }
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+ }
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// Platform-specific shims
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_ =>
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