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Sometimes return the same AllocId for a ConstAllocation
1 parent 5facb42 commit a1c7f3b

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4 files changed

+47
-1
lines changed

4 files changed

+47
-1
lines changed

compiler/rustc_const_eval/src/interpret/machine.rs

+5
Original file line numberDiff line numberDiff line change
@@ -501,6 +501,11 @@ pub trait Machine<'mir, 'tcx: 'mir>: Sized {
501501
) -> InterpResult<'tcx> {
502502
Ok(())
503503
}
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505+
#[inline(always)]
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fn const_alloc_id(ecx: &InterpCx<'mir, 'tcx, Self>, alloc: ConstAllocation<'tcx>) -> AllocId {
507+
ecx.tcx.reserve_and_set_memory_alloc(alloc)
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}
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}
505510

506511
/// A lot of the flexibility above is just needed for `Miri`, but all "compile-time" machines

compiler/rustc_const_eval/src/interpret/operand.rs

+2-1
Original file line numberDiff line numberDiff line change
@@ -760,7 +760,8 @@ impl<'mir, 'tcx: 'mir, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
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mir::ConstValue::Slice { data, meta } => {
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// We rely on mutability being set correctly in `data` to prevent writes
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// where none should happen.
763-
let ptr = Pointer::new(self.tcx.reserve_and_set_memory_alloc(data), Size::ZERO);
763+
let alloc_id = M::const_alloc_id(self, data);
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let ptr = Pointer::new(alloc_id, Size::ZERO);
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Immediate::new_slice(self.global_base_pointer(ptr)?.into(), meta, self)
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}
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};

src/tools/miri/src/machine.rs

+21
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@ use std::process;
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use either::Either;
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use rand::rngs::StdRng;
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use rand::SeedableRng;
13+
use rand::Rng;
1314

1415
use rustc_ast::ast::Mutability;
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use rustc_data_structures::fx::{FxHashMap, FxHashSet};
@@ -531,6 +532,8 @@ pub struct MiriMachine<'mir, 'tcx> {
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/// The spans we will use to report where an allocation was created and deallocated in
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/// diagnostics.
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pub(crate) allocation_spans: RefCell<FxHashMap<AllocId, (Span, Option<Span>)>>,
535+
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const_cache: RefCell<FxHashMap<(ConstAllocation<'tcx>, Instance<'tcx>), Vec<AllocId>>>,
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}
535538

536539
impl<'mir, 'tcx> MiriMachine<'mir, 'tcx> {
@@ -656,6 +659,7 @@ impl<'mir, 'tcx> MiriMachine<'mir, 'tcx> {
656659
stack_size,
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collect_leak_backtraces: config.collect_leak_backtraces,
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allocation_spans: RefCell::new(FxHashMap::default()),
662+
const_cache: RefCell::new(FxHashMap::default()),
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}
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}
661665

@@ -841,6 +845,7 @@ impl VisitProvenance for MiriMachine<'_, '_> {
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stack_size: _,
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collect_leak_backtraces: _,
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allocation_spans: _,
848+
const_cache: _,
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} = self;
845850

846851
threads.visit_provenance(visit);
@@ -1450,4 +1455,20 @@ impl<'mir, 'tcx> Machine<'mir, 'tcx> for MiriMachine<'mir, 'tcx> {
14501455
ecx.machine.allocation_spans.borrow_mut().insert(alloc_id, (span, None));
14511456
Ok(())
14521457
}
1458+
1459+
fn const_alloc_id(
1460+
ecx: &InterpCx<'mir, 'tcx, Self>,
1461+
alloc: ConstAllocation<'tcx>,
1462+
) -> AllocId {
1463+
let instance = ecx.active_thread_stack().last().unwrap().instance;
1464+
let mut cache = ecx.machine.const_cache.borrow_mut();
1465+
let contents = cache.entry((alloc, instance)).or_insert_with(Vec::new);
1466+
if contents.len() < 16 {
1467+
let new = ecx.tcx.reserve_and_set_memory_alloc(alloc);
1468+
contents.push(new);
1469+
new
1470+
} else {
1471+
contents[ecx.machine.rng.borrow_mut().gen::<u8>() as usize % 16]
1472+
}
1473+
}
14531474
}
+19
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
#![feature(strict_provenance)]
2+
3+
const EVALS: usize = 256;
4+
5+
use std::collections::HashSet;
6+
fn main() {
7+
let mut addrs = HashSet::new();
8+
for _ in 0..EVALS {
9+
addrs.insert(get_const_addr());
10+
}
11+
// Check that the const allocation has multiple base addresses
12+
assert!(addrs.len() > 1);
13+
// But also that we get a limited number of unique base addresses
14+
assert!(addrs.len() < EVALS);
15+
}
16+
17+
fn get_const_addr() -> usize {
18+
"test".as_bytes().as_ptr().addr()
19+
}

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