@@ -39,22 +39,22 @@ to use these flags.
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| CPU | FPU | DSP | MVE | Target CPU | Target Features |
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| ----------- | --- | --- | --------- | ------------- | --------------------- |
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| Unspecified | No | No | No | None | None |
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- | Cortex-M33 | No | No | No | ` cortex-m33 ` | ` +soft-float ,-dsp` |
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- | Cortex-M33 | No | Yes | No | ` cortex-m33 ` | ` +soft-float ` |
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+ | Cortex-M33 | No | No | No | ` cortex-m33 ` | ` -fpregs ,-dsp` |
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+ | Cortex-M33 | No | Yes | No | ` cortex-m33 ` | ` -fpregs ` |
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| Cortex-M33 | SP | No | No | ` cortex-m33 ` | ` -dsp ` |
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| Cortex-M33 | SP | Yes | No | ` cortex-m33 ` | None |
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- | Cortex-M35P | No | No | No | ` cortex-m35p ` | ` +soft-float ,-dsp` |
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- | Cortex-M35P | No | Yes | No | ` cortex-m35p ` | ` +soft-float ` |
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+ | Cortex-M35P | No | No | No | ` cortex-m35p ` | ` -fpregs ,-dsp` |
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+ | Cortex-M35P | No | Yes | No | ` cortex-m35p ` | ` -fpregs ` |
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| Cortex-M35P | SP | No | No | ` cortex-m35p ` | ` -dsp ` |
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| Cortex-M35P | SP | Yes | No | ` cortex-m35p ` | None |
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- | Cortex-M55 | No | Yes | No | ` cortex-m55 ` | ` +soft-float ,-mve` |
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+ | Cortex-M55 | No | Yes | No | ` cortex-m55 ` | ` -fpregs ,-mve` |
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| Cortex-M55 | DP | Yes | No | ` cortex-m55 ` | ` -mve ` |
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- | Cortex-M55 | No | Yes | Int | ` cortex-m55 ` | ` +soft-float ,-mve.fp` |
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+ | Cortex-M55 | No | Yes | Int | ` cortex-m55 ` | ` -fpregs ,-mve.fp,+mve ` |
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| Cortex-M55 | DP | Yes | Int | ` cortex-m55 ` | ` -mve.fp ` |
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| Cortex-M55 | DP | Yes | Int+Float | ` cortex-m55 ` | None |
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- | Cortex-M85 | No | Yes | No | ` cortex-m85 ` | ` +soft-float ,-mve` |
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+ | Cortex-M85 | No | Yes | No | ` cortex-m85 ` | ` -fpregs ,-mve` |
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| Cortex-M85 | DP | Yes | No | ` cortex-m85 ` | ` -mve ` |
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- | Cortex-M85 | No | Yes | Int | ` cortex-m85 ` | ` +soft-float ,-mve.fp` |
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+ | Cortex-M85 | No | Yes | Int | ` cortex-m85 ` | ` -fpregs ,-mve.fp,+mve ` |
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| Cortex-M85 | DP | Yes | Int | ` cortex-m85 ` | ` -mve.fp ` |
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| Cortex-M85 | DP | Yes | Int+Float | ` cortex-m85 ` | None |
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@@ -74,6 +74,9 @@ to use these flags.
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| Cortex-M85 | DP | Yes | Int | ` cortex-m85 ` | ` -mve.fp ` |
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| Cortex-M85 | DP | Yes | Int+Float | ` cortex-m85 ` | None |
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+ ** Note:** Never use the ` -fpregs ` * target-feature* with these ` eabihf ` targets
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+ as it will cause compilation units to have different ABIs, which is unsound.
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+
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### Arm Cortex-M33
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The target CPU is ` cortex-m33 ` .
@@ -83,7 +86,7 @@ The target CPU is `cortex-m33`.
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* enabled by default with this * target-cpu*
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* Has an optional single precision FPU
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* support is enabled by default with this * target-cpu*
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- * disable support using the ` +soft-float ` feature (` eabi ` only)
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+ * disable support using the ` -fpregs ` * target- feature* (` eabi ` only)
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### Arm Cortex-M35P
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@@ -94,7 +97,7 @@ The target CPU is `cortex-m35p`.
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* enabled by default with this * target-cpu*
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* Has an optional single precision FPU
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* support is enabled by default with this * target-cpu*
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- * disable support using the ` +soft-float ` feature (` eabi ` only)
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+ * disable support using the ` -fpregs ` * target- feature* (` eabi ` only)
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### Arm Cortex-M55
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@@ -106,7 +109,7 @@ The target CPU is `cortex-m55`.
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* Has an optional double-precision FPU that also supports half-precision FP16
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values
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* support is enabled by default with this * target-cpu*
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- * disable support using the ` +soft-float ` feature (` eabi ` only)
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+ * disable support using the ` -fpregs ` * target- feature* (` eabi ` only)
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* Has optional support for M-Profile Vector Extensions
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* Also known as * Helium Technology*
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* Available with only integer support, or both integer/float support
@@ -125,7 +128,7 @@ The target CPU is `cortex-m85`.
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* Has an optional double-precision FPU that also supports half-precision FP16
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values
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* support is enabled by default with this * target-cpu*
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- * disable support using the ` +soft-float ` feature (` eabi ` only)
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+ * disable support using the ` -fpregs ` * target- feature* (` eabi ` only)
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* Has optional support for M-Profile Vector Extensions
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* Also known as * Helium Technology*
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* Available with only integer support, or both integer/float support
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