[rustfmt] reformat the whole library

Author: gnzlbg

.travis.yml

@@ -16,21 +16,25 @@ matrix:
       script: ci/run.sh
     - install: true
       script: ci/dox.sh
-    - env: RUSTFMT=On NO_ADD=1
+    - env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1
+      script: |
+        cargo install rustfmt-nightly
+        cargo fmt -- --write-mode=diff
+        cd stdsimd
+        cargo fmt -- --write-mode=diff
+        cd assert-instr-macro
+        cargo fmt -- --write-mode=diff
+        cd ../simd-test-macro
+        cargo fmt -- --write-mode=diff
   allow_failures:
-    - env: RUSTFMT=On NO_ADD=1
+    - env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1
 
 install:
   - if [ "$NO_ADD" == "" ]; then rustup target add $TARGET; fi
 
 script:
   - cargo generate-lockfile
-  - ci/run-docker.sh $TARGET
-  - |
-    if [[ ${RUSTFMT} == "On" ]]; then
-      cargo install rustfmt-nightly
-      cargo fmt -- --write-mode=diff
-    fi
+  - then ci/run-docker.sh $TARGET
 
 notifications:
   email:

examples/play.rs

@@ -26,8 +26,12 @@ mod example {
 
         unsafe {
             vendor::_mm_cmpestri(
-                vneedle, needle_len as i32, vhaystack, hay_len as i32,
-                vendor::_SIDD_CMP_EQUAL_ORDERED) as usize
+                vneedle,
+                needle_len as i32,
+                vhaystack,
+                hay_len as i32,
+                vendor::_SIDD_CMP_EQUAL_ORDERED,
+            ) as usize
         }
     }
 

rustfmt.toml

@@ -1 +1,5 @@
-max_width = 79
+max_width = 79
+fn_call_width = 79
+wrap_comments = true
+error_on_line_overflow = false
+fn_args_density = "Compressed"

src/arm/v6.rs

@@ -1,7 +1,8 @@
 //! ARMv6 intrinsics.
 //!
 //! The reference is [ARMv6-M Architecture Reference
-//! Manual](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0419c/index.html).
+//! Manual](http://infocenter.arm.com/help/index.jsp?topic=\
+//! /com.arm.doc.ddi0419c/index.html).
 
 #[cfg(test)]
 use stdsimd_test::assert_instr;

src/arm/v7.rs

@@ -1,7 +1,8 @@
 //! ARMv7 intrinsics.
 //!
 //! The reference is [ARMv7-M Architecture Reference Manual (Issue
-//! E.b)](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0403e.b/index.html).
+//! E.b)](http://infocenter.arm.com/help/index.jsp?topic=\
+//! /com.arm.doc.ddi0403e.b/index.html).
 
 pub use super::v6::*;
 
@@ -39,6 +40,6 @@ pub unsafe fn _rbit_u32(x: u32) -> u32 {
 
 #[allow(dead_code)]
 extern "C" {
-    #[link_name="llvm.bitreverse.i32"]
+    #[link_name = "llvm.bitreverse.i32"]
     fn rbit_u32(i: i32) -> i32;
 }

src/arm/v8.rs

@@ -1,6 +1,7 @@
 //! ARMv8 intrinsics.
 //!
-//! The reference is [ARMv8-A Reference Manual](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0487a.k_10775/index.html).
+//! The reference is [ARMv8-A Reference Manual](http://infocenter.arm.com/\
+//! help/index.jsp?topic=/com.arm.doc.ddi0487a.k_10775/index.html).
 
 pub use super::v7::*;
 
@@ -23,7 +24,7 @@ pub unsafe fn _clz_u64(x: u64) -> u64 {
 
 #[allow(dead_code)]
 extern "C" {
-    #[link_name="llvm.bitreverse.i64"]
+    #[link_name = "llvm.bitreverse.i64"]
     fn rbit_u64(i: i64) -> i64;
 }
 

src/lib.rs

@@ -44,9 +44,9 @@
 //! have no runtime support for whether you CPU actually supports the
 //! instruction.
 //!
-//! CPU target feature detection is done via the `cfg_feature_enabled!` macro at
-//! runtime. This macro will detect at runtime whether the specified feature is
-//! available or not, returning true or false depending on the current CPU.
+//! CPU target feature detection is done via the `cfg_feature_enabled!` macro
+//! at runtime. This macro will detect at runtime whether the specified feature
+//! is available or not, returning true or false depending on the current CPU.
 //!
 //! ```
 //! #![feature(cfg_target_feature)]
@@ -58,7 +58,8 @@
 //!     if cfg_feature_enabled!("avx2") {
 //!         println!("avx2 intrinsics will work");
 //!     } else {
-//!         println!("avx2 intrinsics will not work, they may generate SIGILL");
+//!         println!("avx2 intrinsics will not work");
+//!         // undefined behavior: may generate a `SIGILL`.
 //!     }
 //! }
 //! ```
@@ -93,28 +94,32 @@
 //!
 //! # Status
 //!
-//! This crate is intended for eventual inclusion into the standard library, but
-//! some work and experimentation is needed to get there! First and foremost you
-//! can help out by kicking the tires on this crate and seeing if it works for
-//! your use case! Next up you can help us fill out the [vendor
-//! intrinsics][vendor] to ensure that we've got all the SIMD support necessary.
-//!
-//! The language support and status of SIMD is also still a little up in the air
-//! right now, you may be interested in a few issues along these lines:
-//!
-//! * [Overal tracking issue for SIMD support](https://github.com/rust-lang/rust/issues/27731)
-//! * [`cfg_target_feature` tracking issue](https://github.com/rust-lang/rust/issues/29717)
-//! * [SIMD types currently not sound](https://github.com/rust-lang/rust/issues/44367)
-//! * [`#[target_feature]` improvements](https://github.com/rust-lang/rust/issues/44839)
+//! This crate is intended for eventual inclusion into the standard library,
+//! but some work and experimentation is needed to get there! First and
+//! foremost you can help out by kicking the tires on this crate and seeing if
+//! it works for your use case! Next up you can help us fill out the [vendor
+//! intrinsics][vendor] to ensure that we've got all the SIMD support
+//! necessary.
+//!
+//! The language support and status of SIMD is also still a little up in the
+//! air right now, you may be interested in a few issues along these lines:
+//!
+//! * [Overal tracking issue for SIMD support]
+//!   (https://github.com/rust-lang/rust/issues/27731)
+//! * [`cfg_target_feature` tracking issue]
+//!   (https://github.com/rust-lang/rust/issues/29717)
+//! * [SIMD types currently not sound]
+//!   (https://github.com/rust-lang/rust/issues/44367)
+//! * [`#[target_feature]` improvements]
+//!   (https://github.com/rust-lang/rust/issues/44839)
 //!
 //! [vendor]: https://github.com/rust-lang-nursery/stdsimd/issues/40
 
 #![allow(dead_code)]
 #![allow(unused_features)]
-#![feature(
-    const_fn, link_llvm_intrinsics, platform_intrinsics, repr_simd, simd_ffi,
-    target_feature, cfg_target_feature, i128_type, asm, const_atomic_usize_new
-)]
+#![feature(const_fn, link_llvm_intrinsics, platform_intrinsics, repr_simd,
+          simd_ffi, target_feature, cfg_target_feature, i128_type, asm,
+          const_atomic_usize_new, stmt_expr_attributes)]
 #![cfg_attr(test, feature(proc_macro, test))]
 
 #[cfg(test)]

src/macros.rs

@@ -240,9 +240,11 @@ macro_rules! define_integer_ops {
                 i8, i16, i32, i64, isize);
 
             impl ::std::fmt::LowerHex for $ty {
-                fn fmt(&self, f: &mut ::std::fmt::Formatter) -> ::std::fmt::Result {
+                fn fmt(&self, f: &mut ::std::fmt::Formatter)
+                       -> ::std::fmt::Result {
                     write!(f, "{}(", stringify!($ty))?;
-                    let n = ::std::mem::size_of_val(self) / ::std::mem::size_of::<$elem>();
+                    let n = ::std::mem::size_of_val(self)
+                        / ::std::mem::size_of::<$elem>();
                     for i in 0..n {
                         if i > 0 {
                             write!(f, ", ")?;
@@ -292,8 +294,7 @@ macro_rules! cfg_feature_enabled {
 /// On ARM features are only detected at compile-time using
 /// cfg(target_feature), so if this macro is executed the
 /// feature is not supported.
-#[cfg(any(target_arch = "arm",
-          target_arch = "aarch64"))]
+#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
 #[macro_export]
 #[doc(hidden)]
 macro_rules! __unstable_detect_feature {
@@ -302,10 +303,8 @@ macro_rules! __unstable_detect_feature {
 }
 
 /// In all unsupported architectures using the macro is an error
-#[cfg(not(any(target_arch = "x86",
-              target_arch = "x86_64",
-              target_arch = "arm",
-              target_arch = "aarch64")))]
+#[cfg(not(any(target_arch = "x86", target_arch = "x86_64",
+                  target_arch = "arm", target_arch = "aarch64")))]
 #[macro_export]
 #[doc(hidden)]
 macro_rules! __unstable_detect_feature {

src/v128.rs

@@ -50,7 +50,17 @@ define_from!(u8x16, u64x2, i64x2, u32x4, i32x4, u16x8, i16x8, i8x16);
 define_from!(i8x16, u64x2, i64x2, u32x4, i32x4, u16x8, i16x8, u8x16);
 
 define_common_ops!(
-    f64x2, f32x4, u64x2, i64x2, u32x4, i32x4, u16x8, i16x8, u8x16, i8x16);
+    f64x2,
+    f32x4,
+    u64x2,
+    i64x2,
+    u32x4,
+    i32x4,
+    u16x8,
+    i16x8,
+    u8x16,
+    i8x16
+);
 define_float_ops!(f64x2, f32x4);
 define_integer_ops!(
     (u64x2, u64),
@@ -60,7 +70,8 @@ define_integer_ops!(
     (u16x8, u16),
     (i16x8, i16),
     (u8x16, u8),
-    (i8x16, i8));
+    (i8x16, i8)
+);
 define_casts!(
     (f64x2, f32x2, as_f32x2),
     (f64x2, u64x2, as_u64x2),
@@ -79,4 +90,5 @@ define_casts!(
     (u16x8, i16x8, as_i16x8),
     (i16x8, u16x8, as_u16x8),
     (u8x16, i8x16, as_i8x16),
-    (i8x16, u8x16, as_u8x16));
+    (i8x16, u8x16, as_u8x16)
+);

src/v256.rs

@@ -74,7 +74,17 @@ define_from!(u8x32, u64x4, i64x4, u32x8, i32x8, u16x16, i16x16, i8x32);
 define_from!(i8x32, u64x4, i64x4, u32x8, i32x8, u16x16, i16x16, u8x32);
 
 define_common_ops!(
-    f64x4, f32x8, u64x4, i64x4, u32x8, i32x8, u16x16, i16x16, u8x32, i8x32);
+    f64x4,
+    f32x8,
+    u64x4,
+    i64x4,
+    u32x8,
+    i32x8,
+    u16x16,
+    i16x16,
+    u8x32,
+    i8x32
+);
 define_float_ops!(f64x4, f32x8);
 define_integer_ops!(
     (u64x4, u64),
@@ -84,7 +94,8 @@ define_integer_ops!(
     (u16x16, u16),
     (i16x16, i16),
     (u8x32, u8),
-    (i8x32, i8));
+    (i8x32, i8)
+);
 define_casts!(
     (f64x4, f32x4, as_f32x4),
     (f64x4, u64x4, as_u64x4),
@@ -102,4 +113,5 @@ define_casts!(
     (u16x16, i16x16, as_i16x16),
     (i16x16, u16x16, as_u16x16),
     (u8x32, i8x32, as_i8x32),
-    (i8x32, u8x32, as_u8x32));
+    (i8x32, u8x32, as_u8x32)
+);

src/v512.rs

@@ -120,7 +120,17 @@ define_from!(u8x64, u64x8, i64x8, u32x16, i32x16, u16x32, i16x32, i8x64);
 define_from!(i8x64, u64x8, i64x8, u32x16, i32x16, u16x32, i16x32, u8x64);
 
 define_common_ops!(
-    f64x8, f32x16, u64x8, i64x8, u32x16, i32x16, u16x32, i16x32, u8x64, i8x64);
+    f64x8,
+    f32x16,
+    u64x8,
+    i64x8,
+    u32x16,
+    i32x16,
+    u16x32,
+    i16x32,
+    u8x64,
+    i8x64
+);
 define_float_ops!(f64x8, f32x16);
 define_integer_ops!(
     (u64x8, u64),
@@ -130,7 +140,8 @@ define_integer_ops!(
     (u16x32, u16),
     (i16x32, i16),
     (u8x64, u8),
-    (i8x64, i8));
+    (i8x64, i8)
+);
 define_casts!(
     (f64x8, f32x8, as_f32x8),
     (f64x8, u64x8, as_u64x8),
@@ -148,5 +159,5 @@ define_casts!(
     (u16x32, i16x32, as_i16x32),
     (i16x32, u16x32, as_u16x32),
     (u8x64, i8x64, as_i8x64),
-    (i8x64, u8x64, as_u8x64));
-
+    (i8x64, u8x64, as_u8x64)
+);

src/v64.rs

@@ -42,7 +42,8 @@ define_integer_ops!(
     (u16x4, u16),
     (i16x4, i16),
     (u8x8, u8),
-    (i8x8, i8));
+    (i8x8, i8)
+);
 define_casts!(
     (f32x2, f64x2, as_f64x2),
     (f32x2, u32x2, as_u32x2),
@@ -54,4 +55,5 @@ define_casts!(
     (u16x4, i16x4, as_i16x4),
     (i16x4, u16x4, as_u16x4),
     (u8x8, i8x8, as_i8x8),
-    (i8x8, u8x8, as_u8x8));
+    (i8x8, u8x8, as_u8x8)
+);

src/x86/abm.rs

@@ -4,10 +4,15 @@
 //!
 //! The references are:
 //!
-//! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2: Instruction Set Reference, A-Z](http://www.intel.de/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf).
-//! - [AMD64 Architecture Programmer's Manual, Volume 3: General-Purpose and System Instructions](http://support.amd.com/TechDocs/24594.pdf).
+//! - [Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2:
+//! Instruction Set Reference, A-Z](http://www.intel.de/content/dam/www/public\
+//! /us/en/documents/manuals/64-ia-32-architectures-software-developer-\
+//! instruction-set-reference-manual-325383.pdf).
+//! - [AMD64 Architecture Programmer's Manual, Volume 3: General-Purpose and
+//! System Instructions](http://support.amd.com/TechDocs/24594.pdf).
 //!
-//! [Wikipedia](https://en.wikipedia.org/wiki/Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29)
+//! [Wikipedia](https://en.wikipedia.org/wiki/\
+//! Bit_Manipulation_Instruction_Sets#ABM_.28Advanced_Bit_Manipulation.29)
 //! provides a quick overview of the instructions available.
 
 #[cfg(test)]
@@ -19,27 +24,35 @@ use stdsimd_test::assert_instr;
 #[inline(always)]
 #[target_feature = "+lzcnt"]
 #[cfg_attr(test, assert_instr(lzcnt))]
-pub unsafe fn _lzcnt_u32(x: u32) -> u32 { x.leading_zeros() }
+pub unsafe fn _lzcnt_u32(x: u32) -> u32 {
+    x.leading_zeros()
+}
 
 /// Counts the leading most significant zero bits.
 ///
 /// When the operand is zero, it returns its size in bits.
 #[inline(always)]
 #[target_feature = "+lzcnt"]
 #[cfg_attr(test, assert_instr(lzcnt))]
-pub unsafe fn _lzcnt_u64(x: u64) -> u64 { x.leading_zeros() as u64 }
+pub unsafe fn _lzcnt_u64(x: u64) -> u64 {
+    x.leading_zeros() as u64
+}
 
 /// Counts the bits that are set.
 #[inline(always)]
 #[target_feature = "+popcnt"]
 #[cfg_attr(test, assert_instr(popcnt))]
-pub unsafe fn _popcnt32(x: u32) -> u32 { x.count_ones() }
+pub unsafe fn _popcnt32(x: u32) -> u32 {
+    x.count_ones()
+}
 
 /// Counts the bits that are set.
 #[inline(always)]
 #[target_feature = "+popcnt"]
 #[cfg_attr(test, assert_instr(popcnt))]
-pub unsafe fn _popcnt64(x: u64) -> u64 { x.count_ones() as u64 }
+pub unsafe fn _popcnt64(x: u64) -> u64 {
+    x.count_ones() as u64
+}
 
 #[cfg(test)]
 mod tests {