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stdarch-verify
1 parent 690b3a6 commit 6dc5a95Copy full SHA for 6dc5a95
crates/core_arch/src/arm_shared/neon/generated.rs
@@ -10880,7 +10880,7 @@ pub fn vdupq_n_p16(value: p16) -> poly16x8_t {
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target_arch = "arm",
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unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
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)]
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-pub fn vdupq_n_p8(value: u8) -> poly8x16_t {
+pub fn vdupq_n_p8(value: p8) -> poly8x16_t {
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poly8x16_t::splat(value)
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}
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#[doc = "Duplicate vector element to vector or scalar"]
crates/core_arch/src/x86/sse.rs
@@ -3050,7 +3050,7 @@ mod tests {
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#[simd_test(enable = "sse")]
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- unsafe fn test_mm_shuffle() {
+ unsafe fn test_MM_SHUFFLE() {
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assert_eq!(_MM_SHUFFLE(0, 1, 1, 3), 0b00_01_01_11);
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assert_eq!(_MM_SHUFFLE(3, 1, 1, 0), 0b11_01_01_00);
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assert_eq!(_MM_SHUFFLE(1, 2, 2, 1), 0b01_10_10_01);
crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
@@ -14937,7 +14937,7 @@ intrinsics:
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- ['vdupq_n_u32', 'u32', 'uint32x4_t', 'vdup.32', 'dup', 'uint32x4_t::splat(value)']
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- ['vdupq_n_f32', 'f32', 'float32x4_t', 'vdup.32', 'dup', 'float32x4_t::splat(value)']
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- ['vdupq_n_u64', 'u64', 'uint64x2_t', 'vmov', 'dup', 'uint64x2_t::splat(value)']
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- - ['vdupq_n_p8', 'u8', 'poly8x16_t', 'vdup.8', 'dup', 'poly8x16_t::splat(value)']
+ - ['vdupq_n_p8', 'p8', 'poly8x16_t', 'vdup.8', 'dup', 'poly8x16_t::splat(value)']
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- ['vdupq_n_p16', 'p16', 'poly16x8_t', 'vdup.16', 'dup', 'poly16x8_t::splat(value)']
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- ['vdup_n_s8', 'i8', 'int8x8_t', 'vdup.8', 'dup', 'int8x8_t::splat(value)']
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- ['vdup_n_s16', 'i16', 'int16x4_t', 'vdup.16', 'dup', 'int16x4_t::splat(value)']
crates/stdarch-verify/src/lib.rs
@@ -70,14 +70,7 @@ fn functions(input: TokenStream, dirs: &[&str]) -> TokenStream {
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assert!(!tests.is_empty());
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- functions.retain(|(f, _)| {
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- if let syn::Visibility::Public(_) = f.vis {
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- if f.sig.unsafety.is_some() {
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- return true;
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- }
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- false
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- });
+ functions.retain(|(f, _)| matches!(f.vis, syn::Visibility::Public(_)));
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assert!(!functions.is_empty());
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let input = proc_macro2::TokenStream::from(input);
crates/stdarch-verify/tests/x86-intel.rs
@@ -244,6 +244,7 @@ fn verify_all_signatures() {
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"_fxrstor",
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"_fxrstor64",
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"_xend",
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+ "_xabort_code",
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// Aliases
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"_mm_comige_ss",
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"_mm_cvt_ss2si",
@@ -290,13 +291,10 @@ fn verify_all_signatures() {
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"__cpuid_count" |
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"__cpuid" |
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"__get_cpuid_max" |
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+ "_MM_SHUFFLE" |
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+ "_xabort_code" |
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// Not listed with intel, but manually verified
- "cmpxchg16b" |
- // Intel requires the mask argument for _mm_shuffle_ps to be an
- // unsigned integer, but all other _mm_shuffle_.. intrinsics
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- // take a signed-integer. This breaks `_MM_SHUFFLE` for
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- // `_mm_shuffle_ps`
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- "_mm_shuffle_ps"
+ "cmpxchg16b"
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=> continue,
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_ => {}
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@@ -871,6 +869,11 @@ fn equate(
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// The _mm_stream_load_si128 intrinsic take a mutable pointer in the intrinsics
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// guide even though they never write through the pointer
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(&Type::ConstPtr(&Type::M128I), "void*") if intrinsic.name == "_mm_stream_load_si128" => {}
+ /// Intel requires the mask argument for _mm_shuffle_ps to be an
+ // unsigned integer, but all other _mm_shuffle_.. intrinsics
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+ // take a signed-integer. This breaks `_MM_SHUFFLE` for
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+ // `_mm_shuffle_ps`
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+ (&Type::PrimSigned(32), "unsigned int") if intrinsic.name == "_mm_shuffle_ps" => {}
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_ => bail!(
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"failed to equate: `{intel}` and {t:?} for {}",
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