@@ -384,6 +384,13 @@ extern "C" {
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fn vclzh ( a : vector_signed_short ) -> vector_signed_short ;
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#[ link_name = "llvm.ctlz.v4i32" ]
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fn vclzw ( a : vector_signed_int ) -> vector_signed_int ;
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+
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+ #[ link_name = "llvm.ppc.altivec.vrlb" ]
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+ fn vrlb ( a : vector_signed_char , b : vector_unsigned_char ) -> vector_signed_char ;
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+ #[ link_name = "llvm.ppc.altivec.vrlh" ]
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+ fn vrlh ( a : vector_signed_short , b : vector_unsigned_short ) -> vector_signed_short ;
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+ #[ link_name = "llvm.ppc.altivec.vrlw" ]
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+ fn vrlw ( a : vector_signed_int , c : vector_unsigned_int ) -> vector_signed_int ;
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}
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macro_rules! s_t_l {
@@ -464,6 +471,27 @@ macro_rules! t_t_s {
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} ;
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}
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+ macro_rules! t_u {
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+ ( vector_unsigned_char) => {
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+ vector_unsigned_char
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+ } ;
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+ ( vector_unsigned_short) => {
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+ vector_unsigned_short
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+ } ;
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+ ( vector_unsigned_int) => {
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+ vector_unsigned_int
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+ } ;
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+ ( vector_signed_char) => {
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+ vector_unsigned_char
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+ } ;
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+ ( vector_signed_short) => {
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+ vector_unsigned_short
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+ } ;
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+ ( vector_signed_int) => {
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+ vector_unsigned_int
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+ } ;
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+ }
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+
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macro_rules! impl_from {
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( $s: ident) => {
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#[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
@@ -3126,6 +3154,37 @@ mod sealed {
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impl_vec_cntlz ! { vec_vcntlzh( vector_unsigned_short) }
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impl_vec_cntlz ! { vec_vcntlzw( vector_signed_int) }
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impl_vec_cntlz ! { vec_vcntlzw( vector_unsigned_int) }
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+
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+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
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+ pub trait VectorRl {
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+ type B ;
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+ unsafe fn vec_rl ( self , b : Self :: B ) -> Self ;
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+ }
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+
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+ macro_rules! impl_vec_rl {
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+ ( $fun: ident ( $a: ident) ) => {
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+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
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+ impl VectorRl for $a {
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+ type B = t_u!( $a) ;
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+ #[ inline]
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+ #[ target_feature( enable = "altivec" ) ]
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+ unsafe fn vec_rl( self , b: Self :: B ) -> Self {
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+ transmute( $fun( transmute( self ) , b) )
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+ }
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+ }
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+ } ;
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+ }
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+
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+ test_impl ! { vec_vrlb( a: vector_signed_char, b: vector_unsigned_char) -> vector_signed_char [ vrlb, vrlb] }
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+ test_impl ! { vec_vrlh( a: vector_signed_short, b: vector_unsigned_short) -> vector_signed_short [ vrlh, vrlh] }
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+ test_impl ! { vec_vrlw( a: vector_signed_int, b: vector_unsigned_int) -> vector_signed_int [ vrlw, vrlw] }
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+
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+ impl_vec_rl ! { vec_vrlb( vector_signed_char) }
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+ impl_vec_rl ! { vec_vrlh( vector_signed_short) }
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+ impl_vec_rl ! { vec_vrlw( vector_signed_int) }
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+ impl_vec_rl ! { vec_vrlb( vector_unsigned_char) }
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+ impl_vec_rl ! { vec_vrlh( vector_unsigned_short) }
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+ impl_vec_rl ! { vec_vrlw( vector_unsigned_int) }
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}
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/// Vector Merge Low
@@ -3715,6 +3774,24 @@ where
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a. vec_abss ( )
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}
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+ /// Vector Rotate Left
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+ ///
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+ /// ## Purpose
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+ /// Rotates each element of a vector left by a given number of bits.
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+ ///
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+ /// ## Result value
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+ /// Each element of r is obtained by rotating the corresponding element of a left by
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+ /// the number of bits specified by the corresponding element of b.
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+ #[ inline]
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+ #[ target_feature( enable = "altivec" ) ]
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+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
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+ pub unsafe fn vec_rl < T > ( a : T , b : <T as sealed:: VectorRl >:: B ) -> T
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+ where
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+ T : sealed:: VectorRl ,
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+ {
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+ a. vec_rl ( b)
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+ }
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+
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/// Vector Splat
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#[ inline]
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#[ target_feature( enable = "altivec" ) ]
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