@@ -78,143 +78,143 @@ pub unsafe fn vceqq_f64(a: float64x2_t, b: float64x2_t) -> uint64x2_t {
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_s8 ( a : int8x8_t ) -> uint8x8_t {
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- simd_eq ( a, int8x8_t ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( i8x8 :: new ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_s8 ( a : int8x16_t ) -> uint8x16_t {
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- simd_eq ( a, int8x16_t ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( i8x16 :: new ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_s16 ( a : int16x4_t ) -> uint16x4_t {
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- simd_eq ( a, int16x4_t ( 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( i16x4 :: new ( 0 , 0 , 0 , 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_s16 ( a : int16x8_t ) -> uint16x8_t {
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- simd_eq ( a, int16x8_t ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( i16x8 :: new ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_s32 ( a : int32x2_t ) -> uint32x2_t {
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- simd_eq ( a, int32x2_t ( 0 , 0 ) )
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+ simd_eq ( a, transmute ( i32x2 :: new ( 0 , 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_s32 ( a : int32x4_t ) -> uint32x4_t {
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- simd_eq ( a, int32x4_t ( 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( i32x4 :: new ( 0 , 0 , 0 , 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_s64 ( a : int64x1_t ) -> uint64x1_t {
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- simd_eq ( a, int64x1_t ( 0 ) )
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+ simd_eq ( a, transmute ( i64x1 :: new ( 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_s64 ( a : int64x2_t ) -> uint64x2_t {
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- simd_eq ( a, int64x2_t ( 0 , 0 ) )
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+ simd_eq ( a, transmute ( i64x2 :: new ( 0 , 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_p64 ( a : poly64x1_t ) -> uint64x1_t {
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- simd_eq ( a, poly64x1_t ( 0 ) )
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+ simd_eq ( a, transmute ( i64x1 :: new ( 0 ) ) )
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}
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/// Signed Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_p64 ( a : poly64x2_t ) -> uint64x2_t {
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- simd_eq ( a, poly64x2_t ( 0 , 0 ) )
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+ simd_eq ( a, transmute ( i64x2 :: new ( 0 , 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_u8 ( a : uint8x8_t ) -> uint8x8_t {
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- simd_eq ( a, uint8x8_t ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( u8x8 :: new ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_u8 ( a : uint8x16_t ) -> uint8x16_t {
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- simd_eq ( a, uint8x16_t ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( u8x16 :: new ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_u16 ( a : uint16x4_t ) -> uint16x4_t {
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- simd_eq ( a, uint16x4_t ( 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( u16x4 :: new ( 0 , 0 , 0 , 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_u16 ( a : uint16x8_t ) -> uint16x8_t {
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- simd_eq ( a, uint16x8_t ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( u16x8 :: new ( 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_u32 ( a : uint32x2_t ) -> uint32x2_t {
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- simd_eq ( a, uint32x2_t ( 0 , 0 ) )
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+ simd_eq ( a, transmute ( u32x2 :: new ( 0 , 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_u32 ( a : uint32x4_t ) -> uint32x4_t {
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- simd_eq ( a, uint32x4_t ( 0 , 0 , 0 , 0 ) )
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+ simd_eq ( a, transmute ( u32x4 :: new ( 0 , 0 , 0 , 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqz_u64 ( a : uint64x1_t ) -> uint64x1_t {
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- simd_eq ( a, uint64x1_t ( 0 ) )
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+ simd_eq ( a, transmute ( u64x1 :: new ( 0 ) ) )
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}
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/// Unsigned Compare bitwise equal to zero
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#[ inline]
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#[ target_feature( enable = "neon" ) ]
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#[ cfg_attr( test, assert_instr( vceqz) ) ]
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pub unsafe fn vceqzq_u64 ( a : uint64x2_t ) -> uint64x2_t {
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- simd_eq ( a, uint64x2_t ( 0 , 0 ) )
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+ simd_eq ( a, transmute ( u64x2 :: new ( 0 , 0 ) ) )
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}
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/// Compare signed greater than
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