Fix types for ARM SIMD32 intrinsics

These were previously defined using vector types which is incorrect.
Instead, `{u}int{8x4,16x2}_t` are aliases for `i32` and `u32`.

This also fixes CI since these types don't need to be passed in NEON
registers and this was triggering a newly added compiler warning.

Author: Amanieu

crates/core_arch/src/arm/dsp.rs

@@ -23,17 +23,6 @@
 #[cfg(test)]
 use stdarch_test::assert_instr;
 
-use crate::mem::transmute;
-
-types! {
-    #![unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-
-    /// ARM-specific 32-bit wide vector of two packed `i16`.
-    pub struct int16x2_t(2 x i16);
-    /// ARM-specific 32-bit wide vector of two packed `u16`.
-    pub struct uint16x2_t(2 x u16);
-}
-
 extern "unadjusted" {
     #[link_name = "llvm.arm.smulbb"]
     fn arm_smulbb(a: i32, b: i32) -> i32;
@@ -85,8 +74,8 @@ extern "unadjusted" {
 #[inline]
 #[cfg_attr(test, assert_instr(smulbb))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smulbb(a: int16x2_t, b: int16x2_t) -> i32 {
-    arm_smulbb(transmute(a), transmute(b))
+pub unsafe fn __smulbb(a: i32, b: i32) -> i32 {
+    arm_smulbb(a, b)
 }
 
 /// Insert a SMULTB instruction
@@ -96,8 +85,8 @@ pub unsafe fn __smulbb(a: int16x2_t, b: int16x2_t) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smultb))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smultb(a: int16x2_t, b: int16x2_t) -> i32 {
-    arm_smultb(transmute(a), transmute(b))
+pub unsafe fn __smultb(a: i32, b: i32) -> i32 {
+    arm_smultb(a, b)
 }
 
 /// Insert a SMULTB instruction
@@ -107,8 +96,8 @@ pub unsafe fn __smultb(a: int16x2_t, b: int16x2_t) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smulbt))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smulbt(a: int16x2_t, b: int16x2_t) -> i32 {
-    arm_smulbt(transmute(a), transmute(b))
+pub unsafe fn __smulbt(a: i32, b: i32) -> i32 {
+    arm_smulbt(a, b)
 }
 
 /// Insert a SMULTT instruction
@@ -118,8 +107,8 @@ pub unsafe fn __smulbt(a: int16x2_t, b: int16x2_t) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smultt))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smultt(a: int16x2_t, b: int16x2_t) -> i32 {
-    arm_smultt(transmute(a), transmute(b))
+pub unsafe fn __smultt(a: i32, b: i32) -> i32 {
+    arm_smultt(a, b)
 }
 
 /// Insert a SMULWB instruction
@@ -130,8 +119,8 @@ pub unsafe fn __smultt(a: int16x2_t, b: int16x2_t) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smulwb))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smulwb(a: int16x2_t, b: i32) -> i32 {
-    arm_smulwb(transmute(a), b)
+pub unsafe fn __smulwb(a: i32, b: i32) -> i32 {
+    arm_smulwb(a, b)
 }
 
 /// Insert a SMULWT instruction
@@ -142,8 +131,8 @@ pub unsafe fn __smulwb(a: int16x2_t, b: i32) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smulwt))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smulwt(a: int16x2_t, b: i32) -> i32 {
-    arm_smulwt(transmute(a), b)
+pub unsafe fn __smulwt(a: i32, b: i32) -> i32 {
+    arm_smulwt(a, b)
 }
 
 /// Signed saturating addition
@@ -187,8 +176,8 @@ pub unsafe fn __qdbl(a: i32) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smlabb))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smlabb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
-    arm_smlabb(transmute(a), transmute(b), c)
+pub unsafe fn __smlabb(a: i32, b: i32, c: i32) -> i32 {
+    arm_smlabb(a, b, c)
 }
 
 /// Insert a SMLABT instruction
@@ -199,8 +188,8 @@ pub unsafe fn __smlabb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smlabt))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smlabt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
-    arm_smlabt(transmute(a), transmute(b), c)
+pub unsafe fn __smlabt(a: i32, b: i32, c: i32) -> i32 {
+    arm_smlabt(a, b, c)
 }
 
 /// Insert a SMLATB instruction
@@ -211,8 +200,8 @@ pub unsafe fn __smlabt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smlatb))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smlatb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
-    arm_smlatb(transmute(a), transmute(b), c)
+pub unsafe fn __smlatb(a: i32, b: i32, c: i32) -> i32 {
+    arm_smlatb(a, b, c)
 }
 
 /// Insert a SMLATT instruction
@@ -223,8 +212,8 @@ pub unsafe fn __smlatb(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smlatt))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smlatt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
-    arm_smlatt(transmute(a), transmute(b), c)
+pub unsafe fn __smlatt(a: i32, b: i32, c: i32) -> i32 {
+    arm_smlatt(a, b, c)
 }
 
 /// Insert a SMLAWB instruction
@@ -235,8 +224,8 @@ pub unsafe fn __smlatt(a: int16x2_t, b: int16x2_t, c: i32) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smlawb))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smlawb(a: i32, b: int16x2_t, c: i32) -> i32 {
-    arm_smlawb(a, transmute(b), c)
+pub unsafe fn __smlawb(a: i32, b: i32, c: i32) -> i32 {
+    arm_smlawb(a, b, c)
 }
 
 /// Insert a SMLAWT instruction
@@ -247,8 +236,8 @@ pub unsafe fn __smlawb(a: i32, b: int16x2_t, c: i32) -> i32 {
 #[inline]
 #[cfg_attr(test, assert_instr(smlawt))]
 #[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
-pub unsafe fn __smlawt(a: i32, b: int16x2_t, c: i32) -> i32 {
-    arm_smlawt(a, transmute(b), c)
+pub unsafe fn __smlawt(a: i32, b: i32, c: i32) -> i32 {
+    arm_smlawt(a, b, c)
 }
 
 #[cfg(test)]

crates/core_arch/src/arm/simd32.rs

@@ -65,16 +65,27 @@
 #[cfg(test)]
 use stdarch_test::assert_instr;
 
-use crate::{core_arch::arm::dsp::int16x2_t, mem::transmute};
+use crate::mem::transmute;
 
-types! {
-    #![unstable(feature = "stdarch_arm_dsp", issue = "117237")]
+/// ARM-specific vector of four packed `i8` packed into a 32-bit integer.
+#[allow(non_camel_case_types)]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
+pub type int8x4_t = i32;
 
-    /// ARM-specific 32-bit wide vector of four packed `i8`.
-    pub struct int8x4_t(4 x i8);
-    /// ARM-specific 32-bit wide vector of four packed `u8`.
-    pub struct uint8x4_t(4 x u8);
-}
+/// ARM-specific vector of four packed `u8` packed into a 32-bit integer.
+#[allow(non_camel_case_types)]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
+pub type uint8x4_t = u32;
+
+/// ARM-specific vector of two packed `i16` packed into a 32-bit integer.
+#[allow(non_camel_case_types)]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
+pub type int16x2_t = i32;
+
+/// ARM-specific vector of two packed `u16` packed into a 32-bit integer.
+#[allow(non_camel_case_types)]
+#[unstable(feature = "stdarch_arm_dsp", issue = "117237")]
+pub type uint16x2_t = u32;
 
 macro_rules! dsp_call {
     ($name:expr, $a:expr, $b:expr) => {