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Add gt and lt
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crates/core_arch/src/aarch64/neon.rs

+178-2
Original file line numberDiff line numberDiff line change
@@ -274,6 +274,73 @@ aarch64_simd_ceq!(vceq_p64, uint64x1_t);
274274
aarch64_simd_ceq!(vceqq_p64, uint64x2_t);
275275

276276

277+
macro_rules! aarch64_simd_cgt {
278+
($name:ident, $type:ty) => {
279+
/// Compare signed Greater than (vector)
280+
aarch64_simd_2!($name, $type, simd_gt, cmgt);
281+
};
282+
}
283+
macro_rules! aarch64_simd_cgtu {
284+
($name:ident, $type:ty) => {
285+
/// Compare Greater than (vector)
286+
aarch64_simd_2!($name, $type, simd_gt, cmhi);
287+
};
288+
}
289+
290+
aarch64_simd_cgt!(vcgt_s64, int64x1_t);
291+
aarch64_simd_cgt!(vcgtq_s64, int64x2_t);
292+
aarch64_simd_cgtu!(vcgt_u64, uint64x1_t);
293+
aarch64_simd_cgtu!(vcgtq_u64, uint64x2_t);
294+
295+
/// Compare signed Greater than (vector)
296+
#[inline]
297+
#[target_feature(enable = "neon")]
298+
#[cfg_attr(test, assert_instr(fcmgt))]
299+
pub unsafe fn vcgt_f64(a: float64x1_t, b: float64x1_t) -> uint64x1_t {
300+
simd_gt(a, b)
301+
}
302+
303+
/// Compare signed Greater than (vector)
304+
#[inline]
305+
#[target_feature(enable = "neon")]
306+
#[cfg_attr(test, assert_instr(fcmgt))]
307+
pub unsafe fn vcgtq_f64(a: float64x2_t, b: float64x2_t) -> uint64x2_t {
308+
simd_gt(a, b)
309+
}
310+
311+
macro_rules! aarch64_simd_clt {
312+
($name:ident, $type:ty) => {
313+
/// Compare signed Lesser than (vector)
314+
aarch64_simd_2!($name, $type, simd_lt, cmgt);
315+
};
316+
}
317+
macro_rules! aarch64_simd_cltu {
318+
($name:ident, $type:ty) => {
319+
/// Compare Lesser than (vector)
320+
aarch64_simd_2!($name, $type, simd_lt, cmhi);
321+
};
322+
}
323+
324+
aarch64_simd_clt!(vclt_s64, int64x1_t);
325+
aarch64_simd_clt!(vcltq_s64, int64x2_t);
326+
aarch64_simd_cltu!(vclt_u64, uint64x1_t);
327+
aarch64_simd_cltu!(vcltq_u64, uint64x2_t);
328+
329+
/// Compare signed Lesser than (vector)
330+
#[inline]
331+
#[target_feature(enable = "neon")]
332+
#[cfg_attr(test, assert_instr(fcmgt))]
333+
pub unsafe fn vclt_f64(a: float64x1_t, b: float64x1_t) -> uint64x1_t {
334+
simd_lt(a, b)
335+
}
336+
337+
/// Compare signed Lesser than (vector)
338+
#[inline]
339+
#[target_feature(enable = "neon")]
340+
#[cfg_attr(test, assert_instr(fcmgt))]
341+
pub unsafe fn vcltq_f64(a: float64x2_t, b: float64x2_t) -> uint64x2_t {
342+
simd_lt(a, b)
343+
}
277344

278345
/// Vector add.
279346
#[inline]
@@ -1627,8 +1694,117 @@ mod tests {
16271694
assert_eq!(r, e);
16281695
}
16291696

1697+
#[simd_test(enable = "neon")]
1698+
unsafe fn test_vcgt_s64() {
1699+
let a = i64x1::new(1);
1700+
let b = i64x1::new(0);
1701+
let c = i64x1::new(-1);
1702+
let r: i64x1 = transmute(vcgt_s64(transmute(a), transmute(b)));
1703+
assert_eq!(r, c);
1704+
}
1705+
1706+
#[simd_test(enable = "neon")]
1707+
unsafe fn test_vcgtq_s64() {
1708+
let a = i64x2::new(1, 2);
1709+
let b = i64x2::new(0, 1);
1710+
let c = i64x2::new(-1, -1);
1711+
let r: i64x2 = transmute(vcgtq_s64(transmute(a), transmute(b)));
1712+
assert_eq!(r, c);
1713+
}
1714+
1715+
#[simd_test(enable = "neon")]
1716+
unsafe fn test_vcgt_u64() {
1717+
let a = u64x1::new(1);
1718+
let b = u64x1::new(0);
1719+
let c = u64x1::new(0xFFFFFFFFFFFFFFFF);
1720+
let r: u64x1 = transmute(vcgt_u64(transmute(a), transmute(b)));
1721+
assert_eq!(r, c);
1722+
}
1723+
1724+
#[simd_test(enable = "neon")]
1725+
unsafe fn test_vcgtq_u64() {
1726+
let a = u64x2::new(1, 2);
1727+
let b = u64x2::new(0, 1);
1728+
let c = u64x2::new(0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF);
1729+
let r: u64x2 = transmute(vcgtq_u64(transmute(a), transmute(b)));
1730+
assert_eq!(r, c);
1731+
}
1732+
1733+
#[simd_test(enable = "neon")]
1734+
unsafe fn test_vcgt_f64() {
1735+
let a: f64 = 1.2;
1736+
let b: f64 = 0.1;
1737+
let c = u64x1::new(0xFFFFFFFFFFFFFFFF);
1738+
let r: u64x1 = transmute(vcgt_f64(transmute(a), transmute(b)));
1739+
assert_eq!(r, c);
1740+
}
1741+
1742+
#[simd_test(enable = "neon")]
1743+
unsafe fn test_vcgtq_f64() {
1744+
let a = f64x2::new(1.2, 2.3);
1745+
let b = f64x2::new(0.1, 1.2);
1746+
1747+
let c = u64x2::new(0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF);
1748+
let r: u64x2 = transmute(vcgtq_f64(transmute(a), transmute(b)));
1749+
assert_eq!(r, c);
1750+
}
1751+
1752+
#[simd_test(enable = "neon")]
1753+
unsafe fn test_vclt_s64() {
1754+
let a = i64x1::new(0);
1755+
let b = i64x1::new(1);
1756+
let c = i64x1::new(-1);
1757+
let r: i64x1 = transmute(vclt_s64(transmute(a), transmute(b)));
1758+
assert_eq!(r, c);
1759+
}
16301760

16311761
#[simd_test(enable = "neon")]
1762+
unsafe fn test_vcltq_s64() {
1763+
let a = i64x2::new(0, 1);
1764+
let b = i64x2::new(1, 2);
1765+
let c = i64x2::new(-1, -1);
1766+
let r: i64x2 = transmute(vcltq_s64(transmute(a), transmute(b)));
1767+
assert_eq!(r, c);
1768+
}
1769+
1770+
#[simd_test(enable = "neon")]
1771+
unsafe fn test_vclt_u64() {
1772+
let a = u64x1::new(0);
1773+
let b = u64x1::new(1);
1774+
let c = u64x1::new(0xFFFFFFFFFFFFFFFF);
1775+
let r: u64x1 = transmute(vclt_u64(transmute(a), transmute(b)));
1776+
assert_eq!(r, c);
1777+
}
1778+
1779+
#[simd_test(enable = "neon")]
1780+
unsafe fn test_vcltq_u64() {
1781+
let a = u64x2::new(0, 1);
1782+
let b = u64x2::new(1, 2);
1783+
let c = u64x2::new(0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF);
1784+
let r: u64x2 = transmute(vcltq_u64(transmute(a), transmute(b)));
1785+
assert_eq!(r, c);
1786+
}
1787+
1788+
#[simd_test(enable = "neon")]
1789+
unsafe fn test_vclt_f64() {
1790+
let a: f64 = 0.1;
1791+
let b: f64 = 1.2;
1792+
let c = u64x1::new(0xFFFFFFFFFFFFFFFF);
1793+
let r: u64x1 = transmute(vclt_f64(transmute(a), transmute(b)));
1794+
assert_eq!(r, c);
1795+
}
1796+
1797+
#[simd_test(enable = "neon")]
1798+
unsafe fn test_vcltq_f64() {
1799+
let a = f64x2::new(0.1, 1.2);
1800+
let b = f64x2::new(1.2, 2.3);
1801+
1802+
let c = u64x2::new(0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF);
1803+
let r: u64x2 = transmute(vcltq_f64(transmute(a), transmute(b)));
1804+
assert_eq!(r, c);
1805+
}
1806+
1807+
#[simd_test(enable = "neon")]
16321808
unsafe fn test_vceq_s64() {
16331809
let a = i64x1::new(0x0001020304050607);
16341810
let b = i64x1::new(-1);
@@ -1660,7 +1836,6 @@ mod tests {
16601836
assert_eq!(r, b);
16611837
}
16621838

1663-
16641839
#[simd_test(enable = "neon")]
16651840
unsafe fn test_vceq_f64() {
16661841
let a: f64 = 1.2;
@@ -1670,12 +1845,13 @@ mod tests {
16701845
}
16711846

16721847
#[simd_test(enable = "neon")]
1673-
unsafe fn test_vceqq_f32() {
1848+
unsafe fn test_vceqq_f64() {
16741849
let a = f64x2::new(1.2, 3.4);
16751850
let b = u64x2::new(0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF);
16761851
let r: u64x2 = transmute(vceqq_f64(transmute(a), transmute(a)));
16771852
assert_eq!(r, b);
16781853
}
1854+
16791855
#[simd_test(enable = "neon")]
16801856
unsafe fn test_vmaxv_s8() {
16811857
let r = vmaxv_s8(transmute(i8x8::new(1, 2, 3, 4, -8, 6, 7, 5)));

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