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[X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (llvm#101598)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
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‎clang/docs/ReleaseNotes.rst

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@@ -230,6 +230,8 @@ X86 Support
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found in the file ``clang/www/builtins.py``.
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- Support ISA of ``AVX10.2``.
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* Supported MINMAX intrinsics of ``*_(mask(z)))_minmax(ne)_p[s|d|h|bh]`` and
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``*_(mask(z)))_minmax_s[s|d|h]``.
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Arm and AArch64 Support
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^^^^^^^^^^^^^^^^^^^^^^^

‎clang/include/clang/Basic/BuiltinsX86.def

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@@ -2142,6 +2142,22 @@ TARGET_BUILTIN(__builtin_ia32_vsm4key4256, "V8UiV8UiV8Ui", "nV:256:", "sm4")
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TARGET_BUILTIN(__builtin_ia32_vsm4rnds4128, "V4UiV4UiV4Ui", "nV:128:", "sm4")
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TARGET_BUILTIN(__builtin_ia32_vsm4rnds4256, "V8UiV8UiV8Ui", "nV:256:", "sm4")
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// AVX10 MINMAX
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TARGET_BUILTIN(__builtin_ia32_vminmaxnepbf16128, "V8yV8yV8yIi", "nV:128:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxnepbf16256, "V16yV16yV16yIi", "nV:256:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxnepbf16512, "V32yV32yV32yIi", "nV:512:", "avx10.2-512")
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TARGET_BUILTIN(__builtin_ia32_vminmaxpd128_mask, "V2dV2dV2dIiV2dUc", "nV:128:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxpd256_round_mask, "V4dV4dV4dIiV4dUcIi", "nV:256:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxpd512_round_mask, "V8dV8dV8dIiV8dUcIi", "nV:512:", "avx10.2-512")
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TARGET_BUILTIN(__builtin_ia32_vminmaxph128_mask, "V8xV8xV8xIiV8xUc", "nV:128:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxph256_round_mask, "V16xV16xV16xIiV16xUsIi", "nV:256:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxph512_round_mask, "V32xV32xV32xIiV32xUiIi", "nV:512:", "avx10.2-512")
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TARGET_BUILTIN(__builtin_ia32_vminmaxps128_mask, "V4fV4fV4fIiV4fUc", "nV:128:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxps256_round_mask, "V8fV8fV8fIiV8fUcIi", "nV:256:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxps512_round_mask, "V16fV16fV16fIiV16fUsIi", "nV:512:", "avx10.2-512")
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TARGET_BUILTIN(__builtin_ia32_vminmaxsd_round_mask, "V2dV2dV2dIiV2dUcIi", "nV:128:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxsh_round_mask, "V8xV8xV8xIiV8xUcIi", "nV:128:", "avx10.2-256")
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TARGET_BUILTIN(__builtin_ia32_vminmaxss_round_mask, "V4fV4fV4fIiV4fUcIi", "nV:128:", "avx10.2-256")
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#undef BUILTIN
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#undef TARGET_BUILTIN
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#undef TARGET_HEADER_BUILTIN

‎clang/lib/Headers/CMakeLists.txt

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amxcomplexintrin.h
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amxfp16intrin.h
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amxintrin.h
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avx10_2_512minmaxintrin.h
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avx10_2_512niintrin.h
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avx10_2minmaxintrin.h
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avx10_2niintrin.h
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avx2intrin.h
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avx512bf16intrin.h

‎clang/lib/Headers/avx10_2_512minmaxintrin.h

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/*===---- avx10_2_512minmaxintrin.h - AVX10_2_512MINMAX intrinsics ---------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error \
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"Never use <avx10_2_512minmaxintrin.h> directly; include <immintrin.h> instead."
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#endif // __IMMINTRIN_H
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#ifndef __AVX10_2_512MINMAXINTRIN_H
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#define __AVX10_2_512MINMAXINTRIN_H
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#define _mm512_minmaxne_pbh(A, B, C) \
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((__m512bh)__builtin_ia32_vminmaxnepbf16512( \
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(__v32bf)(__m512bh)(A), (__v32bf)(__m512bh)(A), (int)(C)))
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#define _mm512_mask_minmaxne_pbh(W, U, A, B, C) \
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((__m512bh)__builtin_ia32_selectpbf_512( \
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(__mmask32)(U), \
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(__v32bf)_mm512_minmaxne_pbh((__v32bf)(__m512bh)(A), \
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(__v32bf)(__m512bh)(B), (int)(C)), \
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(__v32bf)(__m512bh)(W)))
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#define _mm512_maskz_minmaxne_pbh(U, A, B, C) \
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((__m512bh)__builtin_ia32_selectpbf_512( \
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(__mmask32)(U), \
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(__v32bf)_mm512_minmaxne_pbh((__v32bf)(__m512bh)(A), \
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(__v32bf)(__m512bh)(B), (int)(C)), \
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(__v32bf) __builtin_bit_cast(__m512bh, _mm512_setzero_ps())))
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#define _mm512_minmax_pd(A, B, C) \
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((__m512d)__builtin_ia32_vminmaxpd512_round_mask( \
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(__v8df)(__m512d)(A), (__v8df)(__m512d)(B), (int)(C), \
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(__v8df)_mm512_undefined_pd(), (__mmask8)-1, \
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_MM_FROUND_CUR_DIRECTION))
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#define _mm512_mask_minmax_pd(W, U, A, B, C) \
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((__m512d)__builtin_ia32_vminmaxpd512_round_mask( \
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(__v8df)(__m512d)(A), (__v8df)(__m512d)(B), (int)(C), \
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(__v8df)(__m512d)(W), (__mmask8)(U), _MM_FROUND_CUR_DIRECTION))
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#define _mm512_maskz_minmax_pd(U, A, B, C) \
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((__m512d)__builtin_ia32_vminmaxpd512_round_mask( \
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(__v8df)(__m512d)(A), (__v8df)(__m512d)(B), (int)(C), \
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(__v8df)_mm512_setzero_pd(), (__mmask8)(U), _MM_FROUND_CUR_DIRECTION))
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#define _mm512_minmax_round_pd(A, B, C, R) \
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((__m512d)__builtin_ia32_vminmaxpd512_round_mask( \
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(__v8df)(__m512d)(A), (__v8df)(__m512d)(B), (int)(C), \
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(__v8df)_mm512_undefined_pd(), (__mmask8)-1, (int)(R)))
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#define _mm512_mask_minmax_round_pd(W, U, A, B, C, R) \
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((__m512d)__builtin_ia32_vminmaxpd512_round_mask( \
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(__v8df)(__m512d)(A), (__v8df)(__m512d)(B), (int)(C), \
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(__v8df)(__m512d)(W), (__mmask8)(U), (int)(R)))
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#define _mm512_maskz_minmax_round_pd(U, A, B, C, R) \
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((__m512d)__builtin_ia32_vminmaxpd512_round_mask( \
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(__v8df)(__m512d)(A), (__v8df)(__m512d)(B), (int)(C), \
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(__v8df)_mm512_setzero_pd(), (__mmask8)(U), (int)(R)))
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#define _mm512_minmax_ph(A, B, C) \
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((__m512h)__builtin_ia32_vminmaxph512_round_mask( \
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(__v32hf)(__m512h)(A), (__v32hf)(__m512h)(B), (int)(C), \
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(__v32hf)_mm512_undefined_ph(), (__mmask32)-1, \
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_MM_FROUND_CUR_DIRECTION))
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#define _mm512_mask_minmax_ph(W, U, A, B, C) \
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((__m512h)__builtin_ia32_vminmaxph512_round_mask( \
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(__v32hf)(__m512h)(A), (__v32hf)(__m512h)(B), (int)(C), \
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(__v32hf)(__m512h)(W), (__mmask32)(U), _MM_FROUND_CUR_DIRECTION))
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#define _mm512_maskz_minmax_ph(U, A, B, C) \
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((__m512h)__builtin_ia32_vminmaxph512_round_mask( \
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(__v32hf)(__m512h)(A), (__v32hf)(__m512h)(B), (int)(C), \
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(__v32hf)_mm512_setzero_ph(), (__mmask32)(U), _MM_FROUND_CUR_DIRECTION))
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#define _mm512_minmax_round_ph(A, B, C, R) \
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((__m512h)__builtin_ia32_vminmaxph512_round_mask( \
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(__v32hf)(__m512h)(A), (__v32hf)(__m512h)(B), (int)(C), \
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(__v32hf)_mm512_undefined_ph(), (__mmask32)-1, (int)(R)))
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#define _mm512_mask_minmax_round_ph(W, U, A, B, C, R) \
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((__m512h)__builtin_ia32_vminmaxph512_round_mask( \
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(__v32hf)(__m512h)(A), (__v32hf)(__m512h)(B), (int)(C), \
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(__v32hf)(__m512h)(W), (__mmask32)(U), (int)(R)))
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#define _mm512_maskz_minmax_round_ph(U, A, B, C, R) \
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((__m512h)__builtin_ia32_vminmaxph512_round_mask( \
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(__v32hf)(__m512h)(A), (__v32hf)(__m512h)(B), (int)(C), \
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(__v32hf)_mm512_setzero_ph(), (__mmask32)(U), (int)(R)))
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#define _mm512_minmax_ps(A, B, C) \
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((__m512)__builtin_ia32_vminmaxps512_round_mask( \
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(__v16sf)(__m512)(A), (__v16sf)(__m512)(B), (int)(C), \
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(__v16sf)_mm512_undefined_ps(), (__mmask16)-1, \
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_MM_FROUND_CUR_DIRECTION))
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#define _mm512_mask_minmax_ps(W, U, A, B, C) \
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((__m512)__builtin_ia32_vminmaxps512_round_mask( \
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(__v16sf)(__m512)(A), (__v16sf)(__m512)(B), (int)(C), (__v16sf)(W), \
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(__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
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#define _mm512_maskz_minmax_ps(U, A, B, C) \
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((__m512)__builtin_ia32_vminmaxps512_round_mask( \
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(__v16sf)(__m512)(A), (__v16sf)(__m512)(B), (int)(C), \
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(__v16sf)_mm512_setzero_ps(), (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
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#define _mm512_minmax_round_ps(A, B, C, R) \
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((__m512)__builtin_ia32_vminmaxps512_round_mask( \
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(__v16sf)(__m512)(A), (__v16sf)(__m512)(B), (int)(C), \
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(__v16sf)_mm512_undefined_ps(), (__mmask16)-1, (int)(R)))
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#define _mm512_mask_minmax_round_ps(W, U, A, B, C, R) \
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((__m512)__builtin_ia32_vminmaxps512_round_mask( \
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(__v16sf)(__m512)(A), (__v16sf)(__m512)(B), (int)(C), (__v16sf)(W), \
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(__mmask16)(U), (int)(R)))
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#define _mm512_maskz_minmax_round_ps(U, A, B, C, R) \
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((__m512)__builtin_ia32_vminmaxps512_round_mask( \
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(__v16sf)(__m512)(A), (__v16sf)(__m512)(B), (int)(C), \
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(__v16sf)_mm512_setzero_ps(), (__mmask16)(U), (int)(R)))
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#endif // __AVX10_2_512MINMAXINTRIN_H

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