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******************************************************************************
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* @attention
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*
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- * <h2><center>© Copyright (c) 2017 STMicroelectronics.
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- * All rights reserved.</center></h2>
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+ * Copyright (c) 2017 STMicroelectronics.
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+ * All rights reserved.
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*
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- * This software component is licensed by ST under BSD 3-Clause license,
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- * the "License"; You may not use this file except in compliance with the
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- * License. You may obtain a copy of the License at:
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- * opensource.org/licenses/BSD-3-Clause
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+ * This software is licensed under terms that can be found in the LICENSE file
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+ * in the root directory of this software component.
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+ * If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#ifndef VECT_TAB_OFFSET
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#define VECT_TAB_OFFSET 0x00000000UL /*!< Vector Table base offset field.
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This value must be a multiple of 0x200. */
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+ #else
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+
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+ #define USER_VECT_TAB_ADDRESS
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+
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#endif
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+
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+ /* Note: Following vector table addresses must be defined in line with linker
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+ configuration. */
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+ /*!< Define USER_VECT_TAB_ADDRESS if you need to relocate the vector table
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+
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+ anywhere in Flash or Sram, else the vector table is kept at the automatic
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+
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+ remap of boot address selected */
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+ #if defined(USER_VECT_TAB_ADDRESS )
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+ #if defined(DUAL_CORE ) && defined(CORE_CM4 )
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+ /*!< Define VECT_TAB_SRAM if you need to relocate your vector Table
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+
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+ in Sram else user remap will be done in Flash. */
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+ #if defined(VECT_TAB_SRAM )
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+ #define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BASE /*!< Vector Table base address field.
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+ This value must be a multiple of 0x200. */
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+ #else
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+ #define VECT_TAB_BASE_ADDRESS FLASH_BANK2_BASE /*!< Vector Table base address field.
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+ This value must be a multiple of 0x200. */
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+ #endif /* VECT_TAB_SRAM */
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+ #else
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+ /*!< Define VECT_TAB_SRAM if you need to relocate your vector Table
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+
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+ in Sram else user remap will be done in Flash. */
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+ #if defined(VECT_TAB_SRAM )
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+ #define VECT_TAB_BASE_ADDRESS D1_AXISRAM_BASE /*!< Vector Table base address field.
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+ This value must be a multiple of 0x200. */
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+ #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
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+ This value must be a multiple of 0x200. */
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+ #else
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+ #define VECT_TAB_BASE_ADDRESS FLASH_BANK1_BASE /*!< Vector Table base address field.
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+ This value must be a multiple of 0x200. */
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+ #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
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+ This value must be a multiple of 0x200. */
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+ #endif /* VECT_TAB_SRAM */
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+ #endif /* DUAL_CORE && CORE_CM4 */
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+ #endif /* USER_VECT_TAB_ADDRESS */
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+
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/******************************************************************************/
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/**
@@ -235,11 +276,9 @@ void SystemInit (void)
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#if defined(DUAL_CORE ) && defined(CORE_CM4 )
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/* Configure the Vector Table location add offset address for cortex-M4 ------------------*/
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- #ifdef VECT_TAB_SRAM
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- SCB -> VTOR = D2_AXISRAM_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal SRAM */
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- #else
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- SCB -> VTOR = FLASH_BANK2_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal FLASH */
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- #endif /* VECT_TAB_SRAM */
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+ #if defined(USER_VECT_TAB_ADDRESS )
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+ SCB -> VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */
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+ #endif /* USER_VECT_TAB_ADDRESS */
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#else
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@@ -251,11 +290,9 @@ void SystemInit (void)
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FMC_Bank1_R -> BTCR [0 ] = 0x000030D2 ;
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/* Configure the Vector Table location add offset address for cortex-M7 ------------------*/
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- #ifdef VECT_TAB_SRAM
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- SCB -> VTOR = D1_AXISRAM_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal AXI-RAM */
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- #else
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- SCB -> VTOR = FLASH_BANK1_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal FLASH */
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- #endif
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+ #if defined(USER_VECT_TAB_ADDRESS )
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+ SCB -> VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
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+ #endif /* USER_VECT_TAB_ADDRESS */
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#endif /*DUAL_CORE && CORE_CM4*/
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@@ -407,4 +444,3 @@ void SystemCoreClockUpdate (void)
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/**
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* @}
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*/
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- /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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