Skip to content

Commit 5568d6d

Browse files
committed
system(L4) update STM32L4xx HAL Drivers to v1.13.2
Included in STM32CubeL4 FW v1.17.1 Signed-off-by: Alexandre Bourdiol <[email protected]>
1 parent b8e39bc commit 5568d6d

File tree

227 files changed

+9797
-7647
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

227 files changed

+9797
-7647
lines changed

system/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

+161-20
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,12 @@
77
******************************************************************************
88
* @attention
99
*
10-
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
11-
* All rights reserved.</center></h2>
10+
* Copyright (c) 2021 STMicroelectronics.
11+
* All rights reserved.
1212
*
13-
* This software component is licensed by ST under BSD 3-Clause license,
14-
* the "License"; You may not use this file except in compliance with the
15-
* License. You may obtain a copy of the License at:
16-
* opensource.org/licenses/BSD-3-Clause
13+
* This software is licensed under terms that can be found in the LICENSE file
14+
* in the root directory of this software component.
15+
* If no LICENSE file comes with this software, it is provided AS-IS.
1716
*
1817
******************************************************************************
1918
*/
@@ -38,6 +37,14 @@ extern "C" {
3837
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
3938
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
4039
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
40+
#if defined(STM32U5)
41+
#define CRYP_DATATYPE_32B CRYP_NO_SWAP
42+
#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
43+
#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
44+
#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
45+
#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
46+
#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
47+
#endif /* STM32U5 */
4148
/**
4249
* @}
4350
*/
@@ -206,6 +213,20 @@ extern "C" {
206213
* @{
207214
*/
208215
#define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
216+
#if defined(STM32U5)
217+
#define MPU_DEVICE_nGnRnE MPU_DEVICE_NGNRNE
218+
#define MPU_DEVICE_nGnRE MPU_DEVICE_NGNRE
219+
#define MPU_DEVICE_nGRE MPU_DEVICE_NGRE
220+
#endif /* STM32U5 */
221+
/**
222+
* @}
223+
*/
224+
225+
/** @defgroup CRC_Aliases CRC API aliases
226+
* @{
227+
*/
228+
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
229+
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
209230
/**
210231
* @}
211232
*/
@@ -235,11 +256,18 @@ extern "C" {
235256
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
236257
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
237258

238-
#if defined(STM32G4) || defined(STM32H7)
259+
#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5)
239260
#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
240261
#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
241262
#endif
242263

264+
#if defined(STM32U5)
265+
#define DAC_TRIGGER_STOP_LPTIM1_OUT DAC_TRIGGER_STOP_LPTIM1_CH1
266+
#define DAC_TRIGGER_STOP_LPTIM3_OUT DAC_TRIGGER_STOP_LPTIM3_CH1
267+
#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1
268+
#define DAC_TRIGGER_LPTIM3_OUT DAC_TRIGGER_LPTIM3_CH1
269+
#endif
270+
243271
#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4)
244272
#define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
245273
#define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
@@ -469,15 +497,24 @@ extern "C" {
469497
#define OB_BOOT_ENTRY_FORCED_FLASH OB_BOOT_LOCK_ENABLE
470498
#endif
471499
#if defined(STM32H7)
472-
#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1
473-
#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1
474-
#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1
475-
#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
476-
#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
477-
#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2
478-
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
479-
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
500+
#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1
501+
#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1
502+
#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1
503+
#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2
504+
#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2
505+
#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2
506+
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
507+
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
480508
#endif /* STM32H7 */
509+
#if defined(STM32U5)
510+
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
511+
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
512+
#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
513+
#define OB_USER_nSWBOOT0 OB_USER_NSWBOOT0
514+
#define OB_USER_nBOOT0 OB_USER_NBOOT0
515+
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
516+
#define OB_nBOOT0_SET OB_NBOOT0_SET
517+
#endif /* STM32U5 */
481518

482519
/**
483520
* @}
@@ -520,6 +557,7 @@ extern "C" {
520557
#define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD
521558
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
522559
#endif /* STM32G4 */
560+
523561
/**
524562
* @}
525563
*/
@@ -594,12 +632,12 @@ extern "C" {
594632
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
595633
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
596634

597-
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB)
635+
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
598636
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
599637
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
600638
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
601639
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
602-
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB*/
640+
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB || STM32U5*/
603641

604642
#if defined(STM32L1)
605643
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
@@ -615,6 +653,20 @@ extern "C" {
615653
#endif /* STM32F0 || STM32F3 || STM32F1 */
616654

617655
#define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1
656+
657+
#if defined(STM32U5)
658+
#define GPIO_AF0_RTC_50Hz GPIO_AF0_RTC_50HZ
659+
#endif /* STM32U5 */
660+
/**
661+
* @}
662+
*/
663+
664+
/** @defgroup HAL_GTZC_Aliased_Defines HAL GTZC Aliased Defines maintained for legacy purpose
665+
* @{
666+
*/
667+
#if defined(STM32U5)
668+
#define GTZC_PERIPH_DCMI GTZC_PERIPH_DCMI_PSSI
669+
#endif /* STM32U5 */
618670
/**
619671
* @}
620672
*/
@@ -851,6 +903,21 @@ extern "C" {
851903
#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS
852904
#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
853905
#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
906+
907+
908+
/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
909+
* @{
910+
*/
911+
#define HAL_LPTIM_ReadCompare HAL_LPTIM_ReadCapturedValue
912+
/**
913+
* @}
914+
*/
915+
916+
#if defined(STM32U5)
917+
#define LPTIM_ISR_CC1 LPTIM_ISR_CC1IF
918+
#define LPTIM_ISR_CC2 LPTIM_ISR_CC2IF
919+
#define LPTIM_CHANNEL_ALL 0x00000000U
920+
#endif /* STM32U5 */
854921
/**
855922
* @}
856923
*/
@@ -1189,6 +1256,10 @@ extern "C" {
11891256
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
11901257
#endif
11911258

1259+
#if defined(STM32U5) || defined(STM32MP2)
1260+
#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
1261+
#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
1262+
#endif
11921263
/**
11931264
* @}
11941265
*/
@@ -1377,6 +1448,20 @@ extern "C" {
13771448
*/
13781449
#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */
13791450

1451+
#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \
1452+
|| defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \
1453+
|| defined(STM32H7) || defined(STM32U5)
1454+
/** @defgroup DMA2D_Aliases DMA2D API Aliases
1455+
* @{
1456+
*/
1457+
#define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort
1458+
for compatibility with legacy code */
1459+
/**
1460+
* @}
1461+
*/
1462+
1463+
#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 || STM32U5 */
1464+
13801465
/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
13811466
* @{
13821467
*/
@@ -1395,6 +1480,29 @@ extern "C" {
13951480
* @}
13961481
*/
13971482

1483+
/** @defgroup HAL_DCACHE_Aliased_Functions HAL DCACHE Aliased Functions maintained for legacy purpose
1484+
* @{
1485+
*/
1486+
1487+
#if defined(STM32U5)
1488+
#define HAL_DCACHE_CleanInvalidateByAddr HAL_DCACHE_CleanInvalidByAddr
1489+
#define HAL_DCACHE_CleanInvalidateByAddr_IT HAL_DCACHE_CleanInvalidByAddr_IT
1490+
#endif /* STM32U5 */
1491+
1492+
/**
1493+
* @}
1494+
*/
1495+
1496+
#if !defined(STM32F2)
1497+
/** @defgroup HASH_alias HASH API alias
1498+
* @{
1499+
*/
1500+
#define HAL_HASHEx_IRQHandler HAL_HASH_IRQHandler /*!< Redirection for compatibility with legacy code */
1501+
/**
1502+
*
1503+
* @}
1504+
*/
1505+
#endif /* STM32F2 */
13981506
/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
13991507
* @{
14001508
*/
@@ -3327,6 +3435,31 @@ extern "C" {
33273435
#define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2
33283436
#define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
33293437
#define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
3438+
#if defined(STM32U5)
3439+
#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL
3440+
#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL
3441+
#define __HAL_RCC_AHB21_CLK_DISABLE __HAL_RCC_AHB2_1_CLK_DISABLE
3442+
#define __HAL_RCC_AHB22_CLK_DISABLE __HAL_RCC_AHB2_2_CLK_DISABLE
3443+
#define __HAL_RCC_AHB1_CLK_Disable_Clear __HAL_RCC_AHB1_CLK_ENABLE
3444+
#define __HAL_RCC_AHB21_CLK_Disable_Clear __HAL_RCC_AHB2_1_CLK_ENABLE
3445+
#define __HAL_RCC_AHB22_CLK_Disable_Clear __HAL_RCC_AHB2_2_CLK_ENABLE
3446+
#define __HAL_RCC_AHB3_CLK_Disable_Clear __HAL_RCC_AHB3_CLK_ENABLE
3447+
#define __HAL_RCC_APB1_CLK_Disable_Clear __HAL_RCC_APB1_CLK_ENABLE
3448+
#define __HAL_RCC_APB2_CLK_Disable_Clear __HAL_RCC_APB2_CLK_ENABLE
3449+
#define __HAL_RCC_APB3_CLK_Disable_Clear __HAL_RCC_APB3_CLK_ENABLE
3450+
#define IS_RCC_MSIPLLModeSelection IS_RCC_MSIPLLMODE_SELECT
3451+
#define RCC_PERIPHCLK_CLK48 RCC_PERIPHCLK_ICLK
3452+
#define RCC_CLK48CLKSOURCE_HSI48 RCC_ICLK_CLKSOURCE_HSI48
3453+
#define RCC_CLK48CLKSOURCE_PLL2 RCC_ICLK_CLKSOURCE_PLL2
3454+
#define RCC_CLK48CLKSOURCE_PLL1 RCC_ICLK_CLKSOURCE_PLL1
3455+
#define RCC_CLK48CLKSOURCE_MSIK RCC_ICLK_CLKSOURCE_MSIK
3456+
#define __HAL_RCC_ADC1_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
3457+
#define __HAL_RCC_ADC1_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
3458+
#define __HAL_RCC_ADC1_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
3459+
#define __HAL_RCC_ADC1_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
3460+
#define __HAL_RCC_ADC1_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
3461+
#define __HAL_RCC_ADC1_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
3462+
#endif
33303463

33313464
/**
33323465
* @}
@@ -3344,7 +3477,7 @@ extern "C" {
33443477
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
33453478
* @{
33463479
*/
3347-
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL)
3480+
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5)
33483481
#else
33493482
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
33503483
#endif
@@ -3401,13 +3534,22 @@ extern "C" {
34013534
* @}
34023535
*/
34033536

3404-
/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
3537+
/** @defgroup HAL_SD_Aliased_Macros HAL SD/MMC Aliased Macros maintained for legacy purpose
34053538
* @{
34063539
*/
34073540

34083541
#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
34093542
#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
34103543

3544+
#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32L1)
3545+
#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
3546+
#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE
3547+
#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
3548+
3549+
#define SDMMC_NSpeed_CLK_DIV SDMMC_NSPEED_CLK_DIV
3550+
#define SDMMC_HSpeed_CLK_DIV SDMMC_HSPEED_CLK_DIV
3551+
#endif
3552+
34113553
#if defined(STM32F4) || defined(STM32F2)
34123554
#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
34133555
#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
@@ -3750,5 +3892,4 @@ extern "C" {
37503892

37513893
#endif /* STM32_HAL_LEGACY */
37523894

3753-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
37543895

system/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy/stm32l4xx_hal_can_legacy.h

+5-9
Original file line numberDiff line numberDiff line change
@@ -6,13 +6,12 @@
66
******************************************************************************
77
* @attention
88
*
9-
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10-
* All rights reserved.</center></h2>
9+
* Copyright (c) 2017 STMicroelectronics.
10+
* All rights reserved.
1111
*
12-
* This software component is licensed by ST under BSD 3-Clause license,
13-
* the "License"; You may not use this file except in compliance with the
14-
* License. You may obtain a copy of the License at:
15-
* opensource.org/licenses/BSD-3-Clause
12+
* This software is licensed under terms that can be found in the LICENSE file
13+
* in the root directory of this software component.
14+
* If no LICENSE file comes with this software, it is provided AS-IS.
1615
*
1716
******************************************************************************
1817
*/
@@ -748,6 +747,3 @@ HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
748747
#endif
749748

750749
#endif /* __STM32L4xx_HAL_CAN_LEGACY_H */
751-
752-
753-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32_assert_template.h

+5-9
Original file line numberDiff line numberDiff line change
@@ -8,13 +8,12 @@
88
******************************************************************************
99
* @attention
1010
*
11-
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
12-
* All rights reserved.</center></h2>
11+
* Copyright (c) 2017 STMicroelectronics.
12+
* All rights reserved.
1313
*
14-
* This software component is licensed by ST under BSD 3-Clause license,
15-
* the "License"; You may not use this file except in compliance with the
16-
* License. You may obtain a copy of the License at:
17-
* opensource.org/licenses/BSD-3-Clause
14+
* This software is licensed under terms that can be found in the LICENSE file
15+
* in the root directory of this software component.
16+
* If no LICENSE file comes with this software, it is provided AS-IS.
1817
*
1918
******************************************************************************
2019
*/
@@ -52,6 +51,3 @@
5251
#endif
5352

5453
#endif /* STM32_ASSERT_H */
55-
56-
57-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

system/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal.h

+5-8
Original file line numberDiff line numberDiff line change
@@ -7,13 +7,12 @@
77
******************************************************************************
88
* @attention
99
*
10-
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
11-
* All rights reserved.</center></h2>
10+
* Copyright (c) 2017 STMicroelectronics.
11+
* All rights reserved.
1212
*
13-
* This software component is licensed by ST under BSD 3-Clause license,
14-
* the "License"; You may not use this file except in compliance with the
15-
* License. You may obtain a copy of the License at:
16-
* opensource.org/licenses/BSD-3-Clause
13+
* This software is licensed under terms that can be found in the LICENSE file
14+
* in the root directory of this software component.
15+
* If no LICENSE file comes with this software, it is provided AS-IS.
1716
*
1817
******************************************************************************
1918
*/
@@ -725,5 +724,3 @@ void HAL_SYSCFG_DisableIOAnalogSwitchBooster(void);
725724
#endif
726725

727726
#endif /* STM32L4xx_HAL_H */
728-
729-
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

0 commit comments

Comments
 (0)