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Merge pull request #1597 from ABOSTM/STM32G4_UPDATE_V1.5.0
Stm32 g4 update v1.5.0
2 parents c010008 + 8073fef commit aac9432

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CI/update/patch/HAL/G4/0001-G4-Fix-LL-FMC-build-issue-introduce-in-HAL-version-v.patch

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This file was deleted.

system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h

+24-13
Original file line numberDiff line numberDiff line change
@@ -7,18 +7,17 @@
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* This file contains:
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* - Data structures and the address mapping for all peripherals
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* - Peripheral's registers declarations and bits definition
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* - Macros to access peripherals registers hardware
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* - Macros to access peripheral's registers hardware
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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* Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
@@ -45,11 +44,11 @@
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/**
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* @brief Configuration of the Cortex-M4 Processor and Core Peripherals
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*/
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#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */
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#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */
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#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */
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#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
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#define __FPU_PRESENT 1 /*!< FPU present */
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#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */
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#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */
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#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */
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#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
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#define __FPU_PRESENT 1U /*!< FPU present */
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/**
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* @}
@@ -912,6 +911,10 @@ typedef struct
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} UCPD_TypeDef;
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/**
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* @}
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*/
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/** @addtogroup Peripheral_memory_map
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* @{
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*/
@@ -1189,6 +1192,15 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -13125,4 +13137,3 @@ typedef struct
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g441xx.h

+24-13
Original file line numberDiff line numberDiff line change
@@ -7,18 +7,17 @@
77
* This file contains:
88
* - Data structures and the address mapping for all peripherals
99
* - Peripheral's registers declarations and bits definition
10-
* - Macros to access peripherals registers hardware
10+
* - Macros to access peripheral's registers hardware
1111
*
1212
******************************************************************************
1313
* @attention
1414
*
15-
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
16-
* All rights reserved.</center></h2>
15+
* Copyright (c) 2019 STMicroelectronics.
16+
* All rights reserved.
1717
*
18-
* This software component is licensed by ST under BSD 3-Clause license,
19-
* the "License"; You may not use this file except in compliance with the
20-
* License. You may obtain a copy of the License at:
21-
* opensource.org/licenses/BSD-3-Clause
18+
* This software is licensed under terms that can be found in the LICENSE file
19+
* in the root directory of this software component.
20+
* If no LICENSE file comes with this software, it is provided AS-IS.
2221
*
2322
******************************************************************************
2423
*/
@@ -45,11 +44,11 @@
4544
/**
4645
* @brief Configuration of the Cortex-M4 Processor and Core Peripherals
4746
*/
48-
#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */
49-
#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */
50-
#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */
51-
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
52-
#define __FPU_PRESENT 1 /*!< FPU present */
47+
#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */
48+
#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */
49+
#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */
50+
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
51+
#define __FPU_PRESENT 1U /*!< FPU present */
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/**
5554
* @}
@@ -944,6 +943,10 @@ typedef struct
944943
} UCPD_TypeDef;
945944

946945

946+
/**
947+
* @}
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*/
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/** @addtogroup Peripheral_memory_map
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* @{
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*/
@@ -1223,6 +1226,15 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
1230+
* @{
1231+
*/
1232+
#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */
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1234+
/**
1235+
* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -13357,4 +13369,3 @@ typedef struct
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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