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[L0] Update CMSIS Cortex-Mx Device Peripheral Access Layer System Source File
Signed-off-by: Frederic Pillon <[email protected]>
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system/STM32L0xx/system_stm32l0xx.c

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Original file line numberDiff line numberDiff line change
@@ -64,13 +64,33 @@
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*/
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/************************* Miscellaneous Configuration ************************/
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/*!< Uncomment the following line if you need to relocate your vector Table in
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Internal SRAM. */
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/* #define VECT_TAB_SRAM */
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#ifndef VECT_TAB_OFFSET
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#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field.
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This value must be a multiple of 0x100. */
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#else
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define USER_VECT_TAB_ADDRESS
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#endif
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/* Note: Following vector table addresses must be defined in line with linker
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configuration. */
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/*!< Uncomment the following line if you need to relocate the vector table
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anywhere in Flash or Sram, else the vector table is kept at the automatic
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remap of boot address selected */
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/* #define USER_VECT_TAB_ADDRESS */
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#if defined(USER_VECT_TAB_ADDRESS)
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/*!< Uncomment the following line if you need to relocate your vector Table
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in Sram else user remap will be done in Flash. */
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/* #define VECT_TAB_SRAM */
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#if defined(VECT_TAB_SRAM)
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#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
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This value must be a multiple of 0x200. */
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#else
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#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
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This value must be a multiple of 0x200. */
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#endif /* VECT_TAB_SRAM */
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#endif /* USER_VECT_TAB_ADDRESS */
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/******************************************************************************/
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/**
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* @}
@@ -145,15 +165,13 @@ void SystemInit (void)
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RCC->CIER = 0x00000000U;
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/* Configure the Vector Table location add offset address ------------------*/
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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#endif
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#if defined (USER_VECT_TAB_ADDRESS)
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SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#endif /* USER_VECT_TAB_ADDRESS */
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}
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/**
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* @brief Update SystemCoreClock according to Clock Register Values
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* @brief Update SystemCoreClock variable according to Clock Register Values.
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* The SystemCoreClock variable contains the core clock (HCLK), it can
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* be used by the user application to setup the SysTick timer or configure
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* other parameters.

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