Skip to content

Commit 2ab8065

Browse files
Cameron McInallymcinally
Cameron McInally
authored and
mcinally
committed
[AArch64][SVE] Add missing fp16 DestructiveInstType tests
These tests should have been added with a5b22b7 in D73711. Differential Revision: https://reviews.llvm.org/D75767
1 parent 97d8d6a commit 2ab8065

File tree

1 file changed

+108
-0
lines changed

1 file changed

+108
-0
lines changed

‎llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-merging.ll

Lines changed: 108 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,18 @@
44
; FADD
55
;
66

7+
define <vscale x 8 x half> @fadd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
8+
; CHECK-LABEL: fadd_h:
9+
; CHECK: movprfx z0.h, p0/z, z0.h
10+
; CHECK-NEXT: fadd z0.h, p0/m, z0.h, z1.h
11+
; CHECK-NEXT: ret
12+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
13+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,
14+
<vscale x 8 x half> %a_z,
15+
<vscale x 8 x half> %b)
16+
ret <vscale x 8 x half> %out
17+
}
18+
719
define <vscale x 4 x float> @fadd_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
820
; CHECK-LABEL: fadd_s:
921
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -32,6 +44,18 @@ define <vscale x 2 x double> @fadd_d(<vscale x 2 x i1> %pg, <vscale x 2 x double
3244
; FMAX
3345
;
3446

47+
define <vscale x 8 x half> @fmax_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
48+
; CHECK-LABEL: fmax_h:
49+
; CHECK: movprfx z0.h, p0/z, z0.h
50+
; CHECK-NEXT: fmax z0.h, p0/m, z0.h, z1.h
51+
; CHECK-NEXT: ret
52+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
53+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,
54+
<vscale x 8 x half> %a_z,
55+
<vscale x 8 x half> %b)
56+
ret <vscale x 8 x half> %out
57+
}
58+
3559
define <vscale x 4 x float> @fmax_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
3660
; CHECK-LABEL: fmax_s:
3761
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -60,6 +84,18 @@ define <vscale x 2 x double> @fmax_d(<vscale x 2 x i1> %pg, <vscale x 2 x double
6084
; FMAXNM
6185
;
6286

87+
define <vscale x 8 x half> @fmaxnm_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
88+
; CHECK-LABEL: fmaxnm_h:
89+
; CHECK: movprfx z0.h, p0/z, z0.h
90+
; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, z1.h
91+
; CHECK-NEXT: ret
92+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
93+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,
94+
<vscale x 8 x half> %a_z,
95+
<vscale x 8 x half> %b)
96+
ret <vscale x 8 x half> %out
97+
}
98+
6399
define <vscale x 4 x float> @fmaxnm_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
64100
; CHECK-LABEL: fmaxnm_s:
65101
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -88,6 +124,18 @@ define <vscale x 2 x double> @fmaxnm_d(<vscale x 2 x i1> %pg, <vscale x 2 x doub
88124
; FMIN
89125
;
90126

127+
define <vscale x 8 x half> @fmin_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
128+
; CHECK-LABEL: fmin_h:
129+
; CHECK: movprfx z0.h, p0/z, z0.h
130+
; CHECK-NEXT: fmin z0.h, p0/m, z0.h, z1.h
131+
; CHECK-NEXT: ret
132+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
133+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,
134+
<vscale x 8 x half> %a_z,
135+
<vscale x 8 x half> %b)
136+
ret <vscale x 8 x half> %out
137+
}
138+
91139
define <vscale x 4 x float> @fmin_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
92140
; CHECK-LABEL: fmin_s:
93141
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -116,6 +164,18 @@ define <vscale x 2 x double> @fmin_d(<vscale x 2 x i1> %pg, <vscale x 2 x double
116164
; FMINNM
117165
;
118166

167+
define <vscale x 8 x half> @fminnm_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
168+
; CHECK-LABEL: fminnm_h:
169+
; CHECK: movprfx z0.h, p0/z, z0.h
170+
; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, z1.h
171+
; CHECK-NEXT: ret
172+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
173+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,
174+
<vscale x 8 x half> %a_z,
175+
<vscale x 8 x half> %b)
176+
ret <vscale x 8 x half> %out
177+
}
178+
119179
define <vscale x 4 x float> @fminnm_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
120180
; CHECK-LABEL: fminnm_s:
121181
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -144,6 +204,18 @@ define <vscale x 2 x double> @fminnm_d(<vscale x 2 x i1> %pg, <vscale x 2 x doub
144204
; FMUL
145205
;
146206

207+
define <vscale x 8 x half> @fmul_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
208+
; CHECK-LABEL: fmul_h:
209+
; CHECK: movprfx z0.h, p0/z, z0.h
210+
; CHECK-NEXT: fmul z0.h, p0/m, z0.h, z1.h
211+
; CHECK-NEXT: ret
212+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
213+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,
214+
<vscale x 8 x half> %a_z,
215+
<vscale x 8 x half> %b)
216+
ret <vscale x 8 x half> %out
217+
}
218+
147219
define <vscale x 4 x float> @fmul_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
148220
; CHECK-LABEL: fmul_s:
149221
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -172,6 +244,18 @@ define <vscale x 2 x double> @fmul_d(<vscale x 2 x i1> %pg, <vscale x 2 x double
172244
; FSUB
173245
;
174246

247+
define <vscale x 8 x half> @fsub_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
248+
; CHECK-LABEL: fsub_h:
249+
; CHECK: movprfx z0.h, p0/z, z0.h
250+
; CHECK-NEXT: fsub z0.h, p0/m, z0.h, z1.h
251+
; CHECK-NEXT: ret
252+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
253+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,
254+
<vscale x 8 x half> %a_z,
255+
<vscale x 8 x half> %b)
256+
ret <vscale x 8 x half> %out
257+
}
258+
175259
define <vscale x 4 x float> @fsub_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
176260
; CHECK-LABEL: fsub_s:
177261
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -200,6 +284,18 @@ define <vscale x 2 x double> @fsub_d(<vscale x 2 x i1> %pg, <vscale x 2 x double
200284
; FSUBR
201285
;
202286

287+
define <vscale x 8 x half> @fsubr_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
288+
; CHECK-LABEL: fsubr_h:
289+
; CHECK: movprfx z0.h, p0/z, z0.h
290+
; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, z1.h
291+
; CHECK-NEXT: ret
292+
%a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer
293+
%out = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %pg,
294+
<vscale x 8 x half> %a_z,
295+
<vscale x 8 x half> %b)
296+
ret <vscale x 8 x half> %out
297+
}
298+
203299
define <vscale x 4 x float> @fsubr_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
204300
; CHECK-LABEL: fsubr_s:
205301
; CHECK: movprfx z0.s, p0/z, z0.s
@@ -224,38 +320,50 @@ define <vscale x 2 x double> @fsubr_d(<vscale x 2 x i1> %pg, <vscale x 2 x doubl
224320
ret <vscale x 2 x double> %out
225321
}
226322

323+
declare <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
227324
declare <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
228325
declare <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
229326

327+
declare <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
230328
declare <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
231329
declare <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
232330

331+
declare <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
233332
declare <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
234333
declare <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
235334

335+
declare <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
236336
declare <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
237337
declare <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
238338

339+
declare <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
239340
declare <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
240341
declare <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
241342

343+
declare <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
242344
declare <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
243345
declare <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
244346

347+
declare <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
245348
declare <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
246349
declare <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
247350

351+
declare <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
248352
declare <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
249353
declare <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
250354

355+
declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
251356
declare <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
252357
declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
253358

359+
declare <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
254360
declare <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
255361
declare <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
256362

363+
declare <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
257364
declare <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
258365
declare <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
259366

367+
declare <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
260368
declare <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
261369
declare <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)

0 commit comments

Comments
 (0)