@@ -50,7 +50,7 @@ define double @test_constant_fold_rcp_f64_half() nounwind {
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define float @test_constant_fold_rcp_f32_43 () nounwind {
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; CHECK-LABEL: @test_constant_fold_rcp_f32_43(
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- ; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01) #5
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+ ; CHECK-NEXT: [[VAL:%.*]] = call float @llvm.amdgcn.rcp.f32(float 4.300000e+01)
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; CHECK-NEXT: ret float [[VAL]]
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;
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%val = call float @llvm.amdgcn.rcp.f32 (float 4 .300000e+01 ) nounwind readnone
@@ -59,7 +59,7 @@ define float @test_constant_fold_rcp_f32_43() nounwind {
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define double @test_constant_fold_rcp_f64_43 () nounwind {
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; CHECK-LABEL: @test_constant_fold_rcp_f64_43(
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- ; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.rcp.f64(double 4.300000e+01) #5
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+ ; CHECK-NEXT: [[VAL:%.*]] = call double @llvm.amdgcn.rcp.f64(double 4.300000e+01)
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; CHECK-NEXT: ret double [[VAL]]
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;
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%val = call double @llvm.amdgcn.rcp.f64 (double 4 .300000e+01 ) nounwind readnone
@@ -1655,7 +1655,7 @@ define i64 @icmp_constant_inputs_false() {
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define i64 @icmp_constant_inputs_true () {
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; CHECK-LABEL: @icmp_constant_inputs_true(
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- ; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0) #6
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+ ; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0) [[CONVERGENT:#[0-9]*]]
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; CHECK-NEXT: ret i64 [[RESULT]]
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;
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%result = call i64 @llvm.amdgcn.icmp.i64.i32 (i32 9 , i32 8 , i32 34 )
@@ -2362,7 +2362,7 @@ define i64 @fcmp_constant_inputs_false() {
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define i64 @fcmp_constant_inputs_true () {
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; CHECK-LABEL: @fcmp_constant_inputs_true(
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- ; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0) #6
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+ ; CHECK-NEXT: [[RESULT:%.*]] = call i64 @llvm.read_register.i64(metadata !0) [[CONVERGENT]]
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; CHECK-NEXT: ret i64 [[RESULT]]
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;
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%result = call i64 @llvm.amdgcn.fcmp.i64.f32 (float 2 .0 , float 4 .0 , i32 4 )
@@ -2655,5 +2655,5 @@ define amdgpu_kernel void @update_dpp_undef_old(i32 addrspace(1)* %out, i32 %in1
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ret void
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}
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- ; CHECK: attributes #6 = { convergent }
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+ ; CHECK: attributes [[CONVERGENT]] = { convergent }
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