@@ -1757,7 +1757,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
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setOperationAction (ISD::CTPOP, MVT::i64 ,
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Subtarget->usePopc () ? Legal : Expand);
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- setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
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setOperationAction (ISD::BSWAP, MVT::i64 , Expand);
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setOperationAction (ISD::ROTL , MVT::i64 , Expand);
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setOperationAction (ISD::ROTR , MVT::i64 , Expand);
@@ -1817,8 +1816,7 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
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setOperationAction (ISD::FCOS , MVT::f32 , Expand);
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setOperationAction (ISD::FSINCOS, MVT::f32 , Expand);
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setOperationAction (ISD::FREM , MVT::f32 , Expand);
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- setOperationAction (ISD::FMA , MVT::f32 , Expand);
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- setOperationAction (ISD::CTTZ, MVT::i32 , Expand);
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+ setOperationAction (ISD::FMA, MVT::f32 , Expand);
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setOperationAction (ISD::ROTL , MVT::i32 , Expand);
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setOperationAction (ISD::ROTR , MVT::i32 , Expand);
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setOperationAction (ISD::BSWAP, MVT::i32 , Expand);
@@ -1996,17 +1994,36 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM,
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setOperationAction (ISD::CTLZ, MVT::i64 , Legal);
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setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i32 , Legal);
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setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i64 , Legal);
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+
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+ setOperationAction (ISD::CTTZ, MVT::i32 ,
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+ Subtarget->is64Bit () ? Promote : Expand);
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+ setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
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+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i32 ,
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+ Subtarget->is64Bit () ? Promote : Expand);
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+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i64 , Expand);
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} else if (Subtarget->usePopc ()) {
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setOperationAction (ISD::CTLZ, MVT::i32 , Expand);
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setOperationAction (ISD::CTLZ, MVT::i64 , Expand);
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setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i32 , Expand);
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setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i64 , Expand);
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+
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+ setOperationAction (ISD::CTTZ, MVT::i32 , Expand);
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+ setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
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+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand);
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+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i64 , Expand);
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} else {
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setOperationAction (ISD::CTLZ, MVT::i32 , Expand);
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setOperationAction (ISD::CTLZ, MVT::i64 , Expand);
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setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i32 ,
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Subtarget->is64Bit () ? Promote : LibCall);
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setOperationAction (ISD::CTLZ_ZERO_UNDEF, MVT::i64 , LibCall);
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+
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+ // FIXME here we don't have any ISA extensions that could help us, so to
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+ // prevent large expansions those should be made into LibCalls.
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+ setOperationAction (ISD::CTTZ, MVT::i32 , Expand);
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+ setOperationAction (ISD::CTTZ, MVT::i64 , Expand);
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+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i32 , Expand);
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+ setOperationAction (ISD::CTTZ_ZERO_UNDEF, MVT::i64 , Expand);
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}
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setOperationAction (ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
@@ -3596,6 +3613,15 @@ bool SparcTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
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bool SparcTargetLowering::isCtlzFast () const { return Subtarget->isVIS3 (); }
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+ bool SparcTargetLowering::isCheapToSpeculateCttz (Type *Ty) const {
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+ // We lack native cttz, however,
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+ // On 64-bit targets it is cheap to implement it in terms of popc.
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+ if (Subtarget->is64Bit () && Subtarget->usePopc ())
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+ return true ;
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+ // Otherwise, implementing cttz in terms of ctlz is still cheap.
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+ return isCheapToSpeculateCtlz (Ty);
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+ }
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+
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// Override to disable global variable loading on Linux.
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void SparcTargetLowering::insertSSPDeclarations (Module &M) const {
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if (!Subtarget->isTargetLinux ())
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