Skip to content

Commit 6771a89

Browse files
committed
[IPRA][ARM] Make use of the "returned" parameter attribute
ARM has code to recognise uses of the "returned" function parameter attribute which guarantee that the value passed to the function in r0 will be returned in r0 unmodified. IPRA replaces the regmask on call instructions, so needs to be told about this to avoid reverting the optimisation. Differential revision: https://reviews.llvm.org/D64986 llvm-svn: 366669
1 parent 6522a7d commit 6771a89

File tree

5 files changed

+39
-0
lines changed

5 files changed

+39
-0
lines changed

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9615,6 +9615,8 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
96159615
Flags.setOrigAlign(OriginalAlignment);
96169616
if (ArgCopyElisionCandidates.count(&Arg))
96179617
Flags.setCopyElisionCandidate();
9618+
if (Arg.hasAttribute(Attribute::Returned))
9619+
Flags.setReturned();
96189620

96199621
MVT RegisterVT = TLI->getRegisterTypeForCallingConv(
96209622
*CurDAG->getContext(), F.getCallingConv(), VT);

llvm/lib/Target/ARM/ARMFrameLowering.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2097,6 +2097,12 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
20972097
AFI->setLRIsSpilledForFarJump(true);
20982098
}
20992099
AFI->setLRIsSpilled(SavedRegs.test(ARM::LR));
2100+
2101+
// If we have the "returned" parameter attribute which guarantees that we
2102+
// return the value which was passed in r0 unmodified (e.g. C++ 'structors),
2103+
// record that fact for IPRA.
2104+
if (AFI->getPreservesR0())
2105+
SavedRegs.set(ARM::R0);
21002106
}
21012107

21022108
MachineBasicBlock::iterator ARMFrameLowering::eliminateCallFramePseudoInstr(

llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3898,6 +3898,12 @@ SDValue ARMTargetLowering::LowerFormalArguments(
38983898
// Transform the arguments in physical registers into virtual ones.
38993899
unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
39003900
ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT);
3901+
3902+
// If this value is passed in r0 and has the returned attribute (e.g.
3903+
// C++ 'structors), record this fact for later use.
3904+
if (VA.getLocReg() == ARM::R0 && Ins[VA.getValNo()].Flags.isReturned()) {
3905+
AFI->setPreservesR0();
3906+
}
39013907
}
39023908

39033909
// If this is an 8 or 16-bit value, it is really passed promoted

llvm/lib/Target/ARM/ARMMachineFunctionInfo.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,10 @@ class ARMFunctionInfo : public MachineFunctionInfo {
130130
/// The amount the literal pool has been increasedby due to promoted globals.
131131
int PromotedGlobalsIncrease = 0;
132132

133+
/// True if r0 will be preserved by a call to this function (e.g. C++
134+
/// con/destructors).
135+
bool PreservesR0 = false;
136+
133137
public:
134138
ARMFunctionInfo() = default;
135139

@@ -247,6 +251,9 @@ class ARMFunctionInfo : public MachineFunctionInfo {
247251
}
248252

249253
DenseMap<unsigned, unsigned> EHPrologueRemappedRegs;
254+
255+
void setPreservesR0() { PreservesR0 = true; }
256+
bool getPreservesR0() const { return PreservesR0; }
250257
};
251258

252259
} // end namespace llvm
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
; RUN: llc -mtriple armv7a--none-eabi -enable-ipra=false < %s | FileCheck %s
2+
; RUN: llc -mtriple armv7a--none-eabi -enable-ipra=true < %s | FileCheck %s
3+
4+
define i32 @returns_r0(i32 returned %a) {
5+
entry:
6+
call void asm sideeffect "", "~{r0}"()
7+
ret i32 %a
8+
}
9+
10+
define i32 @test(i32 %a) {
11+
; CHECK-LABEL: test:
12+
entry:
13+
; CHECK-NOT: r0
14+
; CHECK: bl returns_r0
15+
; CHECK-NOT: r0
16+
%b = call i32 @returns_r0(i32 %a)
17+
ret i32 %a
18+
}

0 commit comments

Comments
 (0)