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[CodeGen] This patch fix a bug that may caused error for a self-defined target in SelectionDAG::getNode (llvm#75320)
we need first judge N1.getNumOperands() > 0. If Lowering Generated SDNode like. ``` v2i32 t20: TargetOpNode. i32 t21: extract_vector_elt t20 0 i32 t22: extract_vector_elt t20 1 ``` will cause a error.
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llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

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@@ -6858,8 +6858,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
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// expanding copies of large vectors from registers. This only works for
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// fixed length vectors, since we need to know the exact number of
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// elements.
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if (N2C && N1.getOperand(0).getValueType().isFixedLengthVector() &&
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N1.getOpcode() == ISD::CONCAT_VECTORS && N1.getNumOperands() > 0) {
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if (N2C && N1.getOpcode() == ISD::CONCAT_VECTORS &&
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N1.getOperand(0).getValueType().isFixedLengthVector()) {
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unsigned Factor =
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N1.getOperand(0).getValueType().getVectorNumElements();
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return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
@@ -6976,7 +6976,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
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// EXTRACT_SUBVECTOR of CONCAT_VECTOR can be simplified if the pieces of
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// the concat have the same type as the extract.
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if (N1.getOpcode() == ISD::CONCAT_VECTORS && N1.getNumOperands() > 0 &&
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if (N1.getOpcode() == ISD::CONCAT_VECTORS &&
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VT == N1.getOperand(0).getValueType()) {
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unsigned Factor = VT.getVectorMinNumElements();
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return N1.getOperand(N2C->getZExtValue() / Factor);

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