@@ -15103,6 +15103,28 @@ getIntrinsicForHexagonNonGCCBuiltin(unsigned BuiltinID) {
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Info Infos[] = {
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#define CUSTOM_BUILTIN_MAPPING(x,s) \
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{ Hexagon::BI__builtin_HEXAGON_##x, Intrinsic::hexagon_##x, s },
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrub_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrb_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadruh_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrh_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadri_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrd_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrub_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrb_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadruh_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrh_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadri_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(L2_loadrd_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerb_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerh_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerf_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storeri_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerd_pci, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerb_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerh_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerf_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storeri_pcr, 0)
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+ CUSTOM_BUILTIN_MAPPING(S2_storerd_pcr, 0)
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CUSTOM_BUILTIN_MAPPING(V6_vmaskedstoreq, 64)
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CUSTOM_BUILTIN_MAPPING(V6_vmaskedstorenq, 64)
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CUSTOM_BUILTIN_MAPPING(V6_vmaskedstorentq, 64)
@@ -15129,63 +15151,47 @@ getIntrinsicForHexagonNonGCCBuiltin(unsigned BuiltinID) {
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Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
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const CallExpr *E) {
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- SmallVector<llvm::Value *, 4> Ops;
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Intrinsic::ID ID;
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unsigned VecLen;
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std::tie(ID, VecLen) = getIntrinsicForHexagonNonGCCBuiltin(BuiltinID);
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- auto MakeCircLd = [& ](unsigned IntID, bool HasImm ) {
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+ auto MakeCircOp = [this, E ](unsigned IntID, bool IsLoad ) {
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// The base pointer is passed by address, so it needs to be loaded.
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- Address BP = EmitPointerWithAlignment(E->getArg(0));
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- BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy),
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- BP .getAlignment());
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+ Address A = EmitPointerWithAlignment(E->getArg(0));
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+ Address BP = Address(
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+ Builder.CreateBitCast(A.getPointer(), Int8PtrPtrTy), A .getAlignment());
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llvm::Value *Base = Builder.CreateLoad(BP);
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- // Operands are Base, Increment, Modifier, Start.
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- if (HasImm)
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- Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)),
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- EmitScalarExpr(E->getArg(3)) };
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- else
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- Ops = { Base, EmitScalarExpr(E->getArg(1)),
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- EmitScalarExpr(E->getArg(2)) };
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+ // The treatment of both loads and stores is the same: the arguments for
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+ // the builtin are the same as the arguments for the intrinsic.
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+ // Load:
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+ // builtin(Base, Inc, Mod, Start) -> intr(Base, Inc, Mod, Start)
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+ // builtin(Base, Mod, Start) -> intr(Base, Mod, Start)
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+ // Store:
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+ // builtin(Base, Inc, Mod, Val, Start) -> intr(Base, Inc, Mod, Val, Start)
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+ // builtin(Base, Mod, Val, Start) -> intr(Base, Mod, Val, Start)
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+ SmallVector<llvm::Value*,5> Ops = { Base };
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+ for (unsigned i = 1, e = E->getNumArgs(); i != e; ++i)
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+ Ops.push_back(EmitScalarExpr(E->getArg(i)));
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llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops);
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- llvm::Value *NewBase = Builder.CreateExtractValue(Result, 1);
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- llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)),
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- NewBase->getType()->getPointerTo());
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+ // The load intrinsics generate two results (Value, NewBase), stores
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+ // generate one (NewBase). The new base address needs to be stored.
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+ llvm::Value *NewBase = IsLoad ? Builder.CreateExtractValue(Result, 1)
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+ : Result;
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+ llvm::Value *LV = Builder.CreateBitCast(
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+ EmitScalarExpr(E->getArg(0)), NewBase->getType()->getPointerTo());
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Address Dest = EmitPointerWithAlignment(E->getArg(0));
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- // The intrinsic generates two results. The new value for the base pointer
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- // needs to be stored.
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- Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment());
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- return Builder.CreateExtractValue(Result, 0);
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- };
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-
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- auto MakeCircSt = [&](unsigned IntID, bool HasImm) {
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- // The base pointer is passed by address, so it needs to be loaded.
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- Address BP = EmitPointerWithAlignment(E->getArg(0));
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- BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy),
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- BP.getAlignment());
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- llvm::Value *Base = Builder.CreateLoad(BP);
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- // Operands are Base, Increment, Modifier, Value, Start.
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- if (HasImm)
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- Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)),
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- EmitScalarExpr(E->getArg(3)), EmitScalarExpr(E->getArg(4)) };
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- else
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- Ops = { Base, EmitScalarExpr(E->getArg(1)),
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- EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3)) };
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-
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- llvm::Value *NewBase = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops);
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- llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)),
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- NewBase->getType()->getPointerTo());
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- Address Dest = EmitPointerWithAlignment(E->getArg(0));
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- // The intrinsic generates one result, which is the new value for the base
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- // pointer. It needs to be stored.
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- return Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment());
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+ llvm::Value *RetVal =
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+ Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment());
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+ if (IsLoad)
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+ RetVal = Builder.CreateExtractValue(Result, 0);
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+ return RetVal;
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};
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// Handle the conversion of bit-reverse load intrinsics to bit code.
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// The intrinsic call after this function only reads from memory and the
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// write to memory is dealt by the store instruction.
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- auto MakeBrevLd = [& ](unsigned IntID, llvm::Type *DestTy) {
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+ auto MakeBrevLd = [this, E ](unsigned IntID, llvm::Type *DestTy) {
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// The intrinsic generates one result, which is the new value for the base
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// pointer. It needs to be returned. The result of the load instruction is
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// passed to intrinsic by address, so the value needs to be stored.
@@ -15203,9 +15209,9 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
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// Operands are Base, Dest, Modifier.
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// The intrinsic format in LLVM IR is defined as
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// { ValueType, i8* } (i8*, i32).
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- Ops = {BaseAddress, EmitScalarExpr(E->getArg(2))};
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+ llvm::Value *Result = Builder.CreateCall(
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+ CGM.getIntrinsic(IntID), {BaseAddress, EmitScalarExpr(E->getArg(2))});
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- llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops);
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// The value needs to be stored as the variable is passed by reference.
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llvm::Value *DestVal = Builder.CreateExtractValue(Result, 0);
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@@ -15257,49 +15263,29 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
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}
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case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadri_pci:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadri_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pcr:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pcr:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pcr:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pcr:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadri_pcr:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadri_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pcr:
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- return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pcr, /*HasImm*/false );
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+ return MakeCircOp(ID, /*IsLoad=*/true );
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case Hexagon::BI__builtin_HEXAGON_S2_storerb_pci:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerb_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerh_pci:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerh_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerf_pci:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerf_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storeri_pci:
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- return MakeCircSt(Intrinsic::hexagon_S2_storeri_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerd_pci:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerd_pci, /*HasImm*/true);
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case Hexagon::BI__builtin_HEXAGON_S2_storerb_pcr:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerb_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storerh_pcr:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerh_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storerf_pcr:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerf_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storeri_pcr:
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- return MakeCircSt(Intrinsic::hexagon_S2_storeri_pcr, /*HasImm*/false);
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case Hexagon::BI__builtin_HEXAGON_S2_storerd_pcr:
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- return MakeCircSt(Intrinsic::hexagon_S2_storerd_pcr , /*HasImm */false);
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+ return MakeCircOp(ID , /*IsLoad= */false);
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case Hexagon::BI__builtin_brev_ldub:
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return MakeBrevLd(Intrinsic::hexagon_L2_loadrub_pbr, Int8Ty);
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case Hexagon::BI__builtin_brev_ldb:
@@ -15312,6 +15298,7 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
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return MakeBrevLd(Intrinsic::hexagon_L2_loadri_pbr, Int32Ty);
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case Hexagon::BI__builtin_brev_ldd:
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return MakeBrevLd(Intrinsic::hexagon_L2_loadrd_pbr, Int64Ty);
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+
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default: {
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if (ID == Intrinsic::not_intrinsic)
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return nullptr;
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