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Krzysztof Parzyszek
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[Hexagon] Refactor handling of circular load/store builtins, NFC
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clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 54 additions & 67 deletions
Original file line numberDiff line numberDiff line change
@@ -15103,6 +15103,28 @@ getIntrinsicForHexagonNonGCCBuiltin(unsigned BuiltinID) {
1510315103
Info Infos[] = {
1510415104
#define CUSTOM_BUILTIN_MAPPING(x,s) \
1510515105
{ Hexagon::BI__builtin_HEXAGON_##x, Intrinsic::hexagon_##x, s },
15106+
CUSTOM_BUILTIN_MAPPING(L2_loadrub_pci, 0)
15107+
CUSTOM_BUILTIN_MAPPING(L2_loadrb_pci, 0)
15108+
CUSTOM_BUILTIN_MAPPING(L2_loadruh_pci, 0)
15109+
CUSTOM_BUILTIN_MAPPING(L2_loadrh_pci, 0)
15110+
CUSTOM_BUILTIN_MAPPING(L2_loadri_pci, 0)
15111+
CUSTOM_BUILTIN_MAPPING(L2_loadrd_pci, 0)
15112+
CUSTOM_BUILTIN_MAPPING(L2_loadrub_pcr, 0)
15113+
CUSTOM_BUILTIN_MAPPING(L2_loadrb_pcr, 0)
15114+
CUSTOM_BUILTIN_MAPPING(L2_loadruh_pcr, 0)
15115+
CUSTOM_BUILTIN_MAPPING(L2_loadrh_pcr, 0)
15116+
CUSTOM_BUILTIN_MAPPING(L2_loadri_pcr, 0)
15117+
CUSTOM_BUILTIN_MAPPING(L2_loadrd_pcr, 0)
15118+
CUSTOM_BUILTIN_MAPPING(S2_storerb_pci, 0)
15119+
CUSTOM_BUILTIN_MAPPING(S2_storerh_pci, 0)
15120+
CUSTOM_BUILTIN_MAPPING(S2_storerf_pci, 0)
15121+
CUSTOM_BUILTIN_MAPPING(S2_storeri_pci, 0)
15122+
CUSTOM_BUILTIN_MAPPING(S2_storerd_pci, 0)
15123+
CUSTOM_BUILTIN_MAPPING(S2_storerb_pcr, 0)
15124+
CUSTOM_BUILTIN_MAPPING(S2_storerh_pcr, 0)
15125+
CUSTOM_BUILTIN_MAPPING(S2_storerf_pcr, 0)
15126+
CUSTOM_BUILTIN_MAPPING(S2_storeri_pcr, 0)
15127+
CUSTOM_BUILTIN_MAPPING(S2_storerd_pcr, 0)
1510615128
CUSTOM_BUILTIN_MAPPING(V6_vmaskedstoreq, 64)
1510715129
CUSTOM_BUILTIN_MAPPING(V6_vmaskedstorenq, 64)
1510815130
CUSTOM_BUILTIN_MAPPING(V6_vmaskedstorentq, 64)
@@ -15129,63 +15151,47 @@ getIntrinsicForHexagonNonGCCBuiltin(unsigned BuiltinID) {
1512915151

1513015152
Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
1513115153
const CallExpr *E) {
15132-
SmallVector<llvm::Value *, 4> Ops;
1513315154
Intrinsic::ID ID;
1513415155
unsigned VecLen;
1513515156
std::tie(ID, VecLen) = getIntrinsicForHexagonNonGCCBuiltin(BuiltinID);
1513615157

15137-
auto MakeCircLd = [&](unsigned IntID, bool HasImm) {
15158+
auto MakeCircOp = [this, E](unsigned IntID, bool IsLoad) {
1513815159
// The base pointer is passed by address, so it needs to be loaded.
15139-
Address BP = EmitPointerWithAlignment(E->getArg(0));
15140-
BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy),
15141-
BP.getAlignment());
15160+
Address A = EmitPointerWithAlignment(E->getArg(0));
15161+
Address BP = Address(
15162+
Builder.CreateBitCast(A.getPointer(), Int8PtrPtrTy), A.getAlignment());
1514215163
llvm::Value *Base = Builder.CreateLoad(BP);
15143-
// Operands are Base, Increment, Modifier, Start.
15144-
if (HasImm)
15145-
Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)),
15146-
EmitScalarExpr(E->getArg(3)) };
15147-
else
15148-
Ops = { Base, EmitScalarExpr(E->getArg(1)),
15149-
EmitScalarExpr(E->getArg(2)) };
15164+
// The treatment of both loads and stores is the same: the arguments for
15165+
// the builtin are the same as the arguments for the intrinsic.
15166+
// Load:
15167+
// builtin(Base, Inc, Mod, Start) -> intr(Base, Inc, Mod, Start)
15168+
// builtin(Base, Mod, Start) -> intr(Base, Mod, Start)
15169+
// Store:
15170+
// builtin(Base, Inc, Mod, Val, Start) -> intr(Base, Inc, Mod, Val, Start)
15171+
// builtin(Base, Mod, Val, Start) -> intr(Base, Mod, Val, Start)
15172+
SmallVector<llvm::Value*,5> Ops = { Base };
15173+
for (unsigned i = 1, e = E->getNumArgs(); i != e; ++i)
15174+
Ops.push_back(EmitScalarExpr(E->getArg(i)));
1515015175

1515115176
llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops);
15152-
llvm::Value *NewBase = Builder.CreateExtractValue(Result, 1);
15153-
llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)),
15154-
NewBase->getType()->getPointerTo());
15177+
// The load intrinsics generate two results (Value, NewBase), stores
15178+
// generate one (NewBase). The new base address needs to be stored.
15179+
llvm::Value *NewBase = IsLoad ? Builder.CreateExtractValue(Result, 1)
15180+
: Result;
15181+
llvm::Value *LV = Builder.CreateBitCast(
15182+
EmitScalarExpr(E->getArg(0)), NewBase->getType()->getPointerTo());
1515515183
Address Dest = EmitPointerWithAlignment(E->getArg(0));
15156-
// The intrinsic generates two results. The new value for the base pointer
15157-
// needs to be stored.
15158-
Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment());
15159-
return Builder.CreateExtractValue(Result, 0);
15160-
};
15161-
15162-
auto MakeCircSt = [&](unsigned IntID, bool HasImm) {
15163-
// The base pointer is passed by address, so it needs to be loaded.
15164-
Address BP = EmitPointerWithAlignment(E->getArg(0));
15165-
BP = Address(Builder.CreateBitCast(BP.getPointer(), Int8PtrPtrTy),
15166-
BP.getAlignment());
15167-
llvm::Value *Base = Builder.CreateLoad(BP);
15168-
// Operands are Base, Increment, Modifier, Value, Start.
15169-
if (HasImm)
15170-
Ops = { Base, EmitScalarExpr(E->getArg(1)), EmitScalarExpr(E->getArg(2)),
15171-
EmitScalarExpr(E->getArg(3)), EmitScalarExpr(E->getArg(4)) };
15172-
else
15173-
Ops = { Base, EmitScalarExpr(E->getArg(1)),
15174-
EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3)) };
15175-
15176-
llvm::Value *NewBase = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops);
15177-
llvm::Value *LV = Builder.CreateBitCast(EmitScalarExpr(E->getArg(0)),
15178-
NewBase->getType()->getPointerTo());
15179-
Address Dest = EmitPointerWithAlignment(E->getArg(0));
15180-
// The intrinsic generates one result, which is the new value for the base
15181-
// pointer. It needs to be stored.
15182-
return Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment());
15184+
llvm::Value *RetVal =
15185+
Builder.CreateAlignedStore(NewBase, LV, Dest.getAlignment());
15186+
if (IsLoad)
15187+
RetVal = Builder.CreateExtractValue(Result, 0);
15188+
return RetVal;
1518315189
};
1518415190

1518515191
// Handle the conversion of bit-reverse load intrinsics to bit code.
1518615192
// The intrinsic call after this function only reads from memory and the
1518715193
// write to memory is dealt by the store instruction.
15188-
auto MakeBrevLd = [&](unsigned IntID, llvm::Type *DestTy) {
15194+
auto MakeBrevLd = [this, E](unsigned IntID, llvm::Type *DestTy) {
1518915195
// The intrinsic generates one result, which is the new value for the base
1519015196
// pointer. It needs to be returned. The result of the load instruction is
1519115197
// passed to intrinsic by address, so the value needs to be stored.
@@ -15203,9 +15209,9 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
1520315209
// Operands are Base, Dest, Modifier.
1520415210
// The intrinsic format in LLVM IR is defined as
1520515211
// { ValueType, i8* } (i8*, i32).
15206-
Ops = {BaseAddress, EmitScalarExpr(E->getArg(2))};
15212+
llvm::Value *Result = Builder.CreateCall(
15213+
CGM.getIntrinsic(IntID), {BaseAddress, EmitScalarExpr(E->getArg(2))});
1520715214

15208-
llvm::Value *Result = Builder.CreateCall(CGM.getIntrinsic(IntID), Ops);
1520915215
// The value needs to be stored as the variable is passed by reference.
1521015216
llvm::Value *DestVal = Builder.CreateExtractValue(Result, 0);
1521115217

@@ -15257,49 +15263,29 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
1525715263
}
1525815264

1525915265
case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pci:
15260-
return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pci, /*HasImm*/true);
1526115266
case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pci:
15262-
return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pci, /*HasImm*/true);
1526315267
case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pci:
15264-
return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pci, /*HasImm*/true);
1526515268
case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pci:
15266-
return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pci, /*HasImm*/true);
1526715269
case Hexagon::BI__builtin_HEXAGON_L2_loadri_pci:
15268-
return MakeCircLd(Intrinsic::hexagon_L2_loadri_pci, /*HasImm*/true);
1526915270
case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pci:
15270-
return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pci, /*HasImm*/true);
1527115271
case Hexagon::BI__builtin_HEXAGON_L2_loadrub_pcr:
15272-
return MakeCircLd(Intrinsic::hexagon_L2_loadrub_pcr, /*HasImm*/false);
1527315272
case Hexagon::BI__builtin_HEXAGON_L2_loadrb_pcr:
15274-
return MakeCircLd(Intrinsic::hexagon_L2_loadrb_pcr, /*HasImm*/false);
1527515273
case Hexagon::BI__builtin_HEXAGON_L2_loadruh_pcr:
15276-
return MakeCircLd(Intrinsic::hexagon_L2_loadruh_pcr, /*HasImm*/false);
1527715274
case Hexagon::BI__builtin_HEXAGON_L2_loadrh_pcr:
15278-
return MakeCircLd(Intrinsic::hexagon_L2_loadrh_pcr, /*HasImm*/false);
1527915275
case Hexagon::BI__builtin_HEXAGON_L2_loadri_pcr:
15280-
return MakeCircLd(Intrinsic::hexagon_L2_loadri_pcr, /*HasImm*/false);
1528115276
case Hexagon::BI__builtin_HEXAGON_L2_loadrd_pcr:
15282-
return MakeCircLd(Intrinsic::hexagon_L2_loadrd_pcr, /*HasImm*/false);
15277+
return MakeCircOp(ID, /*IsLoad=*/true);
1528315278
case Hexagon::BI__builtin_HEXAGON_S2_storerb_pci:
15284-
return MakeCircSt(Intrinsic::hexagon_S2_storerb_pci, /*HasImm*/true);
1528515279
case Hexagon::BI__builtin_HEXAGON_S2_storerh_pci:
15286-
return MakeCircSt(Intrinsic::hexagon_S2_storerh_pci, /*HasImm*/true);
1528715280
case Hexagon::BI__builtin_HEXAGON_S2_storerf_pci:
15288-
return MakeCircSt(Intrinsic::hexagon_S2_storerf_pci, /*HasImm*/true);
1528915281
case Hexagon::BI__builtin_HEXAGON_S2_storeri_pci:
15290-
return MakeCircSt(Intrinsic::hexagon_S2_storeri_pci, /*HasImm*/true);
1529115282
case Hexagon::BI__builtin_HEXAGON_S2_storerd_pci:
15292-
return MakeCircSt(Intrinsic::hexagon_S2_storerd_pci, /*HasImm*/true);
1529315283
case Hexagon::BI__builtin_HEXAGON_S2_storerb_pcr:
15294-
return MakeCircSt(Intrinsic::hexagon_S2_storerb_pcr, /*HasImm*/false);
1529515284
case Hexagon::BI__builtin_HEXAGON_S2_storerh_pcr:
15296-
return MakeCircSt(Intrinsic::hexagon_S2_storerh_pcr, /*HasImm*/false);
1529715285
case Hexagon::BI__builtin_HEXAGON_S2_storerf_pcr:
15298-
return MakeCircSt(Intrinsic::hexagon_S2_storerf_pcr, /*HasImm*/false);
1529915286
case Hexagon::BI__builtin_HEXAGON_S2_storeri_pcr:
15300-
return MakeCircSt(Intrinsic::hexagon_S2_storeri_pcr, /*HasImm*/false);
1530115287
case Hexagon::BI__builtin_HEXAGON_S2_storerd_pcr:
15302-
return MakeCircSt(Intrinsic::hexagon_S2_storerd_pcr, /*HasImm*/false);
15288+
return MakeCircOp(ID, /*IsLoad=*/false);
1530315289
case Hexagon::BI__builtin_brev_ldub:
1530415290
return MakeBrevLd(Intrinsic::hexagon_L2_loadrub_pbr, Int8Ty);
1530515291
case Hexagon::BI__builtin_brev_ldb:
@@ -15312,6 +15298,7 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
1531215298
return MakeBrevLd(Intrinsic::hexagon_L2_loadri_pbr, Int32Ty);
1531315299
case Hexagon::BI__builtin_brev_ldd:
1531415300
return MakeBrevLd(Intrinsic::hexagon_L2_loadrd_pbr, Int64Ty);
15301+
1531515302
default: {
1531615303
if (ID == Intrinsic::not_intrinsic)
1531715304
return nullptr;

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