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[ARM] Rename NEONModImm to VMOVModImm. NFC
Rename NEONModImm to VMOVModImm as it is used in both NEON and MVE. llvm-svn: 366790
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8 files changed

+46
-46
lines changed

8 files changed

+46
-46
lines changed

‎llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -5146,7 +5146,7 @@ SDValue ARMTargetLowering::LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const {
51465146

51475147
if (UseNEON) {
51485148
// Use VBSL to copy the sign bit.
5149-
unsigned EncodedVal = ARM_AM::createNEONModImm(0x6, 0x80);
5149+
unsigned EncodedVal = ARM_AM::createVMOVModImm(0x6, 0x80);
51505150
SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32,
51515151
DAG.getTargetConstant(EncodedVal, dl, MVT::i32));
51525152
EVT OpVT = (VT == MVT::f32) ? MVT::v2i32 : MVT::v1i64;
@@ -5169,7 +5169,7 @@ SDValue ARMTargetLowering::LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const {
51695169
Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0);
51705170
Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1);
51715171

5172-
SDValue AllOnes = DAG.getTargetConstant(ARM_AM::createNEONModImm(0xe, 0xff),
5172+
SDValue AllOnes = DAG.getTargetConstant(ARM_AM::createVMOVModImm(0xe, 0xff),
51735173
dl, MVT::i32);
51745174
AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes);
51755175
SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask,
@@ -6033,13 +6033,13 @@ static SDValue LowerSETCCCARRY(SDValue Op, SelectionDAG &DAG) {
60336033
CCR, Chain.getValue(1));
60346034
}
60356035

6036-
/// isNEONModifiedImm - Check if the specified splat value corresponds to a
6037-
/// valid vector constant for a NEON or MVE instruction with a "modified immediate"
6038-
/// operand (e.g., VMOV). If so, return the encoded value.
6039-
static SDValue isNEONModifiedImm(uint64_t SplatBits, uint64_t SplatUndef,
6036+
/// isVMOVModifiedImm - Check if the specified splat value corresponds to a
6037+
/// valid vector constant for a NEON or MVE instruction with a "modified
6038+
/// immediate" operand (e.g., VMOV). If so, return the encoded value.
6039+
static SDValue isVMOVModifiedImm(uint64_t SplatBits, uint64_t SplatUndef,
60406040
unsigned SplatBitSize, SelectionDAG &DAG,
60416041
const SDLoc &dl, EVT &VT, bool is128Bits,
6042-
NEONModImmType type) {
6042+
VMOVModImmType type) {
60436043
unsigned OpCmode, Imm;
60446044

60456045
// SplatBitSize is set to the smallest size that splats the vector, so a
@@ -6169,10 +6169,10 @@ static SDValue isNEONModifiedImm(uint64_t SplatBits, uint64_t SplatUndef,
61696169
}
61706170

61716171
default:
6172-
llvm_unreachable("unexpected size for isNEONModifiedImm");
6172+
llvm_unreachable("unexpected size for isVMOVModifiedImm");
61736173
}
61746174

6175-
unsigned EncodedVal = ARM_AM::createNEONModImm(OpCmode, Imm);
6175+
unsigned EncodedVal = ARM_AM::createVMOVModImm(OpCmode, Imm);
61766176
return DAG.getTargetConstant(EncodedVal, dl, MVT::i32);
61776177
}
61786178

@@ -6252,7 +6252,7 @@ SDValue ARMTargetLowering::LowerConstantFP(SDValue Op, SelectionDAG &DAG,
62526252
return SDValue();
62536253

62546254
// Try a VMOV.i32 (FIXME: i8, i16, or i64 could work too).
6255-
SDValue NewVal = isNEONModifiedImm(iVal & 0xffffffffU, 0, 32, DAG, SDLoc(Op),
6255+
SDValue NewVal = isVMOVModifiedImm(iVal & 0xffffffffU, 0, 32, DAG, SDLoc(Op),
62566256
VMovVT, false, VMOVModImm);
62576257
if (NewVal != SDValue()) {
62586258
SDLoc DL(Op);
@@ -6269,7 +6269,7 @@ SDValue ARMTargetLowering::LowerConstantFP(SDValue Op, SelectionDAG &DAG,
62696269
}
62706270

62716271
// Finally, try a VMVN.i32
6272-
NewVal = isNEONModifiedImm(~iVal & 0xffffffffU, 0, 32, DAG, SDLoc(Op), VMovVT,
6272+
NewVal = isVMOVModifiedImm(~iVal & 0xffffffffU, 0, 32, DAG, SDLoc(Op), VMovVT,
62736273
false, VMVNModImm);
62746274
if (NewVal != SDValue()) {
62756275
SDLoc DL(Op);
@@ -6694,7 +6694,7 @@ SDValue ARMTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
66946694
(ST->hasMVEIntegerOps() && SplatBitSize <= 32)) {
66956695
// Check if an immediate VMOV works.
66966696
EVT VmovVT;
6697-
SDValue Val = isNEONModifiedImm(SplatBits.getZExtValue(),
6697+
SDValue Val = isVMOVModifiedImm(SplatBits.getZExtValue(),
66986698
SplatUndef.getZExtValue(), SplatBitSize,
66996699
DAG, dl, VmovVT, VT.is128BitVector(),
67006700
VMOVModImm);
@@ -6706,7 +6706,7 @@ SDValue ARMTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
67066706

67076707
// Try an immediate VMVN.
67086708
uint64_t NegatedImm = (~SplatBits).getZExtValue();
6709-
Val = isNEONModifiedImm(
6709+
Val = isVMOVModifiedImm(
67106710
NegatedImm, SplatUndef.getZExtValue(), SplatBitSize,
67116711
DAG, dl, VmovVT, VT.is128BitVector(),
67126712
ST->hasMVEIntegerOps() ? MVEVMVNModImm : VMVNModImm);
@@ -11259,7 +11259,7 @@ static SDValue PerformANDCombine(SDNode *N,
1125911259
BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) {
1126011260
if (SplatBitSize <= 64) {
1126111261
EVT VbicVT;
11262-
SDValue Val = isNEONModifiedImm((~SplatBits).getZExtValue(),
11262+
SDValue Val = isVMOVModifiedImm((~SplatBits).getZExtValue(),
1126311263
SplatUndef.getZExtValue(), SplatBitSize,
1126411264
DAG, dl, VbicVT, VT.is128BitVector(),
1126511265
OtherModImm);
@@ -11495,7 +11495,7 @@ static SDValue PerformORCombine(SDNode *N,
1149511495
BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) {
1149611496
if (SplatBitSize <= 64) {
1149711497
EVT VorrVT;
11498-
SDValue Val = isNEONModifiedImm(SplatBits.getZExtValue(),
11498+
SDValue Val = isVMOVModifiedImm(SplatBits.getZExtValue(),
1149911499
SplatUndef.getZExtValue(), SplatBitSize,
1150011500
DAG, dl, VorrVT, VT.is128BitVector(),
1150111501
OtherModImm);
@@ -12338,7 +12338,7 @@ static SDValue PerformVDUPLANECombine(SDNode *N,
1233812338
// The canonical VMOV for a zero vector uses a 32-bit element size.
1233912339
unsigned Imm = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1234012340
unsigned EltBits;
12341-
if (ARM_AM::decodeNEONModImm(Imm, EltBits) == 0)
12341+
if (ARM_AM::decodeVMOVModImm(Imm, EltBits) == 0)
1234212342
EltSize = 8;
1234312343
EVT VT = N->getValueType(0);
1234412344
if (EltSize > VT.getScalarSizeInBits())

‎llvm/lib/Target/ARM/ARMISelLowering.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -838,7 +838,7 @@ class VectorType;
838838
void setAllExpand(MVT VT);
839839
};
840840

841-
enum NEONModImmType {
841+
enum VMOVModImmType {
842842
VMOVModImm,
843843
VMVNModImm,
844844
MVEVMVNModImm,

‎llvm/lib/Target/ARM/ARMInstrFormats.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2282,7 +2282,7 @@ class N1ModImm<bit op23, bits<3> op21_19, bits<4> op11_8, bit op7, bit op6,
22822282
let Inst{24} = SIMM{7};
22832283
let Inst{18-16} = SIMM{6-4};
22842284
let Inst{3-0} = SIMM{3-0};
2285-
let DecoderMethod = "DecodeNEONModImmInstruction";
2285+
let DecoderMethod = "DecodeVMOVModImmInstruction";
22862286
}
22872287

22882288
// NEON 2 vector register format.

‎llvm/lib/Target/ARM/ARMInstrNEON.td

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -15,22 +15,22 @@
1515
// NEON-specific Operands.
1616
//===----------------------------------------------------------------------===//
1717
def nModImm : Operand<i32> {
18-
let PrintMethod = "printNEONModImmOperand";
18+
let PrintMethod = "printVMOVModImmOperand";
1919
}
2020

2121
def nImmSplatI8AsmOperand : AsmOperandClass { let Name = "NEONi8splat"; }
2222
def nImmSplatI8 : Operand<i32> {
23-
let PrintMethod = "printNEONModImmOperand";
23+
let PrintMethod = "printVMOVModImmOperand";
2424
let ParserMatchClass = nImmSplatI8AsmOperand;
2525
}
2626
def nImmSplatI16AsmOperand : AsmOperandClass { let Name = "NEONi16splat"; }
2727
def nImmSplatI16 : Operand<i32> {
28-
let PrintMethod = "printNEONModImmOperand";
28+
let PrintMethod = "printVMOVModImmOperand";
2929
let ParserMatchClass = nImmSplatI16AsmOperand;
3030
}
3131
def nImmSplatI32AsmOperand : AsmOperandClass { let Name = "NEONi32splat"; }
3232
def nImmSplatI32 : Operand<i32> {
33-
let PrintMethod = "printNEONModImmOperand";
33+
let PrintMethod = "printVMOVModImmOperand";
3434
let ParserMatchClass = nImmSplatI32AsmOperand;
3535
}
3636
def nImmSplatNotI16AsmOperand : AsmOperandClass { let Name = "NEONi16splatNot"; }
@@ -43,7 +43,7 @@ def nImmSplatNotI32 : Operand<i32> {
4343
}
4444
def nImmVMOVI32AsmOperand : AsmOperandClass { let Name = "NEONi32vmov"; }
4545
def nImmVMOVI32 : Operand<i32> {
46-
let PrintMethod = "printNEONModImmOperand";
46+
let PrintMethod = "printVMOVModImmOperand";
4747
let ParserMatchClass = nImmVMOVI32AsmOperand;
4848
}
4949

@@ -62,18 +62,18 @@ class nImmVINVIAsmOperandReplicate<ValueType From, ValueType To>
6262
}
6363

6464
class nImmVMOVIReplicate<ValueType From, ValueType To> : Operand<i32> {
65-
let PrintMethod = "printNEONModImmOperand";
65+
let PrintMethod = "printVMOVModImmOperand";
6666
let ParserMatchClass = nImmVMOVIAsmOperandReplicate<From, To>;
6767
}
6868

6969
class nImmVINVIReplicate<ValueType From, ValueType To> : Operand<i32> {
70-
let PrintMethod = "printNEONModImmOperand";
70+
let PrintMethod = "printVMOVModImmOperand";
7171
let ParserMatchClass = nImmVINVIAsmOperandReplicate<From, To>;
7272
}
7373

7474
def nImmVMOVI32NegAsmOperand : AsmOperandClass { let Name = "NEONi32vmovNeg"; }
7575
def nImmVMOVI32Neg : Operand<i32> {
76-
let PrintMethod = "printNEONModImmOperand";
76+
let PrintMethod = "printVMOVModImmOperand";
7777
let ParserMatchClass = nImmVMOVI32NegAsmOperand;
7878
}
7979
def nImmVMOVF32 : Operand<i32> {
@@ -82,7 +82,7 @@ def nImmVMOVF32 : Operand<i32> {
8282
}
8383
def nImmSplatI64AsmOperand : AsmOperandClass { let Name = "NEONi64splat"; }
8484
def nImmSplatI64 : Operand<i32> {
85-
let PrintMethod = "printNEONModImmOperand";
85+
let PrintMethod = "printVMOVModImmOperand";
8686
let ParserMatchClass = nImmSplatI64AsmOperand;
8787
}
8888

@@ -559,14 +559,14 @@ def NEONvtbl2 : SDNode<"ARMISD::VTBL2", SDTARMVTBL2>;
559559
def NEONimmAllZerosV: PatLeaf<(ARMvmovImm (i32 timm)), [{
560560
ConstantSDNode *ConstVal = cast<ConstantSDNode>(N->getOperand(0));
561561
unsigned EltBits = 0;
562-
uint64_t EltVal = ARM_AM::decodeNEONModImm(ConstVal->getZExtValue(), EltBits);
562+
uint64_t EltVal = ARM_AM::decodeVMOVModImm(ConstVal->getZExtValue(), EltBits);
563563
return (EltBits == 32 && EltVal == 0);
564564
}]>;
565565

566566
def NEONimmAllOnesV: PatLeaf<(ARMvmovImm (i32 timm)), [{
567567
ConstantSDNode *ConstVal = cast<ConstantSDNode>(N->getOperand(0));
568568
unsigned EltBits = 0;
569-
uint64_t EltVal = ARM_AM::decodeNEONModImm(ConstVal->getZExtValue(), EltBits);
569+
uint64_t EltVal = ARM_AM::decodeVMOVModImm(ConstVal->getZExtValue(), EltBits);
570570
return (EltBits == 8 && EltVal == 0xff);
571571
}]>;
572572

‎llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -314,7 +314,7 @@ static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Val,
314314
uint64_t Address, const void *Decoder);
315315
static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Val,
316316
uint64_t Address, const void *Decoder);
317-
static DecodeStatus DecodeNEONModImmInstruction(MCInst &Inst,unsigned Val,
317+
static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst,unsigned Val,
318318
uint64_t Address, const void *Decoder);
319319
static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst,unsigned Val,
320320
uint64_t Address, const void *Decoder);
@@ -3445,7 +3445,7 @@ static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn,
34453445
}
34463446

34473447
static DecodeStatus
3448-
DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn,
3448+
DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn,
34493449
uint64_t Address, const void *Decoder) {
34503450
DecodeStatus S = MCDisassembler::Success;
34513451

@@ -5679,7 +5679,7 @@ static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn,
56795679
}
56805680
}
56815681
}
5682-
return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
5682+
return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);
56835683
}
56845684

56855685
if (!(imm & 0x20)) return MCDisassembler::Fail;
@@ -5738,7 +5738,7 @@ static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn,
57385738
}
57395739
}
57405740
}
5741-
return DecodeNEONModImmInstruction(Inst, Insn, Address, Decoder);
5741+
return DecodeVMOVModImmInstruction(Inst, Insn, Address, Decoder);
57425742
}
57435743

57445744
if (!(imm & 0x20)) return MCDisassembler::Fail;

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -518,31 +518,31 @@ namespace ARM_AM {
518518
// Valid alignments depend on the specific instruction.
519519

520520
//===--------------------------------------------------------------------===//
521-
// NEON Modified Immediates
521+
// NEON/MVE Modified Immediates
522522
//===--------------------------------------------------------------------===//
523523
//
524-
// Several NEON instructions (e.g., VMOV) take a "modified immediate"
524+
// Several NEON and MVE instructions (e.g., VMOV) take a "modified immediate"
525525
// vector operand, where a small immediate encoded in the instruction
526526
// specifies a full NEON vector value. These modified immediates are
527527
// represented here as encoded integers. The low 8 bits hold the immediate
528528
// value; bit 12 holds the "Op" field of the instruction, and bits 11-8 hold
529529
// the "Cmode" field of the instruction. The interfaces below treat the
530530
// Op and Cmode values as a single 5-bit value.
531531

532-
inline unsigned createNEONModImm(unsigned OpCmode, unsigned Val) {
532+
inline unsigned createVMOVModImm(unsigned OpCmode, unsigned Val) {
533533
return (OpCmode << 8) | Val;
534534
}
535-
inline unsigned getNEONModImmOpCmode(unsigned ModImm) {
535+
inline unsigned getVMOVModImmOpCmode(unsigned ModImm) {
536536
return (ModImm >> 8) & 0x1f;
537537
}
538-
inline unsigned getNEONModImmVal(unsigned ModImm) { return ModImm & 0xff; }
538+
inline unsigned getVMOVModImmVal(unsigned ModImm) { return ModImm & 0xff; }
539539

540-
/// decodeNEONModImm - Decode a NEON modified immediate value into the
540+
/// decodeVMOVModImm - Decode a NEON/MVE modified immediate value into the
541541
/// element value and the element size in bits. (If the element size is
542542
/// smaller than the vector, it is splatted into all the elements.)
543-
inline uint64_t decodeNEONModImm(unsigned ModImm, unsigned &EltBits) {
544-
unsigned OpCmode = getNEONModImmOpCmode(ModImm);
545-
unsigned Imm8 = getNEONModImmVal(ModImm);
543+
inline uint64_t decodeVMOVModImm(unsigned ModImm, unsigned &EltBits) {
544+
unsigned OpCmode = getVMOVModImmOpCmode(ModImm);
545+
unsigned Imm8 = getVMOVModImmVal(ModImm);
546546
uint64_t Val = 0;
547547

548548
if (OpCmode == 0xe) {
@@ -572,7 +572,7 @@ namespace ARM_AM {
572572
}
573573
EltBits = 64;
574574
} else {
575-
llvm_unreachable("Unsupported NEON immediate");
575+
llvm_unreachable("Unsupported VMOV immediate");
576576
}
577577
return Val;
578578
}

‎llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1334,12 +1334,12 @@ void ARMInstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum,
13341334
<< markup(">");
13351335
}
13361336

1337-
void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum,
1337+
void ARMInstPrinter::printVMOVModImmOperand(const MCInst *MI, unsigned OpNum,
13381338
const MCSubtargetInfo &STI,
13391339
raw_ostream &O) {
13401340
unsigned EncodedImm = MI->getOperand(OpNum).getImm();
13411341
unsigned EltBits;
1342-
uint64_t Val = ARM_AM::decodeNEONModImm(EncodedImm, EltBits);
1342+
uint64_t Val = ARM_AM::decodeVMOVModImm(EncodedImm, EltBits);
13431343
O << markup("<imm:") << "#0x";
13441344
O.write_hex(Val);
13451345
O << markup(">");

‎llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,7 @@ class ARMInstPrinter : public MCInstPrinter {
191191
const MCSubtargetInfo &STI, raw_ostream &O);
192192
void printFPImmOperand(const MCInst *MI, unsigned OpNum,
193193
const MCSubtargetInfo &STI, raw_ostream &O);
194-
void printNEONModImmOperand(const MCInst *MI, unsigned OpNum,
194+
void printVMOVModImmOperand(const MCInst *MI, unsigned OpNum,
195195
const MCSubtargetInfo &STI, raw_ostream &O);
196196
void printImmPlusOneOperand(const MCInst *MI, unsigned OpNum,
197197
const MCSubtargetInfo &STI, raw_ostream &O);

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