H7/GIGA QSPI experiments and Questions

[mjs513]

As mentioned here: #77 (comment), I managed to get QSPI working via direct access. Just have to add CONFIG_FLASH=y to the associated configuration files.

Using that same approach threw together a library to write directly to address associated with qspi that I used before for FRAM and on the T4 QSPI

extRAM_h7.zip

The example outputs:

Starting...
Device INFO:
Device Name: qspi-nor-flash@90000000
QSPI Partition Size: 16777216
QSPI Partition Defined: 16252928
=================
Data_0: true
Data_1: 1.3574999571
Data_2: 314159
Data_3: 142
Data_4: 0xBlock of 1024 0x42's loaded in array

...... ...... ......
The Quick Brown Fox
Init Done - array loaded
...... ...... ......
...... ...... ......
...... ...... ......
Data_0: true
Data_1: 1.3574999571
Data_2: 314159
Data_3: 142
Data_4: 
Data_5: The Quick Brown Fox
...... ...... ......
Read Write test done - check data if successfull
...... ...... ......
Starting Device Erase......
QSPI Erased!

Now there are a couple questions I need to have.

1. When I dumped storage flash sizes I get

Device Name: qspi-nor-flash@90000000
QSPI Partition Size: 16777216
QSPI Partition Defined: 16252928

the partition size comes from calling flash_get_size(flash_dev, &size); while the expected size is DT_SIZE_K(15872) which is in the dtsi file for the stm32h747. There is a difference, not sure why and wondering if this could affect things later on.

2. Right now #define SPI_FLASH_SECTOR_SIZE 4096 wondering if this is the correct setting.

Cheers - at least one more thing is working.

[mjs513]

3/8/25
a few more questions in trying to understand QSPI and Overalay.

Looking at zephyr/boards/arm/arduino_giga_r1
/arduino_giga_r1_m7.dts it shows:

&quadspi {
	pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6
		     &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
		     &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pf6>;
	pinctrl-names = "default";
	status = "okay";

	n25q128a1: qspi-nor-flash@0 {
		compatible = "st,stm32-qspi-nor";
		reg = <0>;
		qspi-max-frequency = <72000000>;
		size = <DT_SIZE_M(16*8)>;
		status = "okay";
...

which seems to indicate that the nor flash is a n25q128a1 but on the data sheet for the giga it looks like its a AT25SF128A. Now in a alot of cases the commands tend to be pretty much the same from what I remember of the datasheets on the nor-flash chips we tested on teensy but there can be differences.

So in case does it matter? I do see for the IMXRT1010 it has

	at25sf128a: at25sf128a@0 {
		compatible = "nxp,imx-flexspi-nor";
		size = <DT_SIZE_M(16 * 8)>;
		reg = <0>;
		spi-max-frequency = <133000000>;
		status = "okay";
		jedec-id = [1f 89 01];
	};

On the portenta H7 looks like its a MX25L12833. Doesn't seem like it defined anywhere