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Jan 10, 2023
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8 changes: 2 additions & 6 deletions llvm/lib/CodeGen/TypePromotion.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -570,7 +570,6 @@ void IRPromoter::Cleanup() {
LLVM_DEBUG(dbgs() << "IR Promotion: Cleanup..\n");
// Some zexts will now have become redundant, along with their trunc
// operands, so remove them.
// Some zexts need to be replaced with truncate if src bitwidth is larger.
for (auto *V : Visited) {
if (!isa<ZExtInst>(V))
continue;
Expand All @@ -585,11 +584,6 @@ void IRPromoter::Cleanup() {
<< "\n");
ReplaceAllUsersOfWith(ZExt, Src);
continue;
} else if (ZExt->getSrcTy()->getScalarSizeInBits() > PromotedWidth) {
IRBuilder<> Builder{ZExt};
Value *Trunc = Builder.CreateTrunc(Src, ZExt->getDestTy());
ReplaceAllUsersOfWith(ZExt, Trunc);
continue;
}

// We've inserted a trunc for a zext sink, but we already know that the
Expand Down Expand Up @@ -626,6 +620,8 @@ void IRPromoter::ConvertTruncs() {
ConstantInt *Mask =
ConstantInt::get(SrcTy, APInt::getMaxValue(NumBits).getZExtValue());
Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask);
if (SrcTy != ExtTy)
Masked = Builder.CreateTrunc(Masked, ExtTy);

if (auto *I = dyn_cast<Instruction>(Masked))
NewInsts.insert(I);
Expand Down
20 changes: 0 additions & 20 deletions llvm/test/Transforms/TypePromotion/AArch64/pr58843.ll

This file was deleted.

36 changes: 36 additions & 0 deletions llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll
Original file line number Diff line number Diff line change
Expand Up @@ -177,3 +177,39 @@ latch: ; preds = %bb14, %bb9
exit:
ret i64 %var30
}

; Check the case don't crash due to zext source type bitwidth
; larger than dest type bitwidth.
define i1 @pr58843(i8 %arg) {
; CHECK-LABEL: @pr58843(
; CHECK-NEXT: [[EXT1:%.*]] = zext i8 [[ARG:%.*]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[EXT1]], 7
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP2]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%ext1 = zext i8 %arg to i64
%trunc = trunc i64 %ext1 to i3
%ext2 = zext i3 %trunc to i8
%cmp = icmp ne i8 %ext2, 0
ret i1 %cmp
}

; Check the case don't crash due to xor two op have different
; types
define i1 @pr59554(i8 %arg) {
; CHECK-LABEL: @pr59554(
; CHECK-NEXT: [[ARG_EXT:%.*]] = zext i8 [[ARG:%.*]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[ARG_EXT]], 7
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: [[SWITCH_TABLEIDX:%.*]] = xor i32 [[TMP2]], 1
; CHECK-NEXT: [[SWITCH_LOBIT:%.*]] = icmp ne i32 [[TMP2]], 0
; CHECK-NEXT: ret i1 [[SWITCH_LOBIT]]
;
%arg.ext = zext i8 %arg to i64
%trunc = trunc i64 %arg.ext to i3
%switch.tableidx = xor i3 %trunc, 1
%switch.maskindex = zext i3 %trunc to i8
%switch.lobit = icmp ne i8 %switch.maskindex, 0
ret i1 %switch.lobit
}