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[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (#140002)
Add per-property has<Prop>/set<Prop>/reset<Prop> functions to MachineFunctionProperties.
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69 files changed

+152
-246
lines changed

‎llvm/include/llvm/CodeGen/BranchFoldingPass.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,7 @@ class BranchFolderPass : public PassInfoMixin<BranchFolderPass> {
2121
MachineFunctionAnalysisManager &MFAM);
2222

2323
MachineFunctionProperties getRequiredProperties() const {
24-
return MachineFunctionProperties().set(
25-
MachineFunctionProperties::Property::NoPHIs);
24+
return MachineFunctionProperties().setNoPHIs();
2625
}
2726
};
2827

‎llvm/include/llvm/CodeGen/ExecutionDomainFix.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -148,8 +148,7 @@ class ExecutionDomainFix : public MachineFunctionPass {
148148
bool runOnMachineFunction(MachineFunction &MF) override;
149149

150150
MachineFunctionProperties getRequiredProperties() const override {
151-
return MachineFunctionProperties().set(
152-
MachineFunctionProperties::Property::NoVRegs);
151+
return MachineFunctionProperties().setNoVRegs();
153152
}
154153

155154
private:

‎llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -41,14 +41,13 @@ class InstructionSelect : public MachineFunctionPass {
4141

4242
MachineFunctionProperties getRequiredProperties() const override {
4343
return MachineFunctionProperties()
44-
.set(MachineFunctionProperties::Property::IsSSA)
45-
.set(MachineFunctionProperties::Property::Legalized)
46-
.set(MachineFunctionProperties::Property::RegBankSelected);
44+
.setIsSSA()
45+
.setLegalized()
46+
.setRegBankSelected();
4747
}
4848

4949
MachineFunctionProperties getSetProperties() const override {
50-
return MachineFunctionProperties().set(
51-
MachineFunctionProperties::Property::Selected);
50+
return MachineFunctionProperties().setSelected();
5251
}
5352

5453
InstructionSelect(CodeGenOptLevel OL = CodeGenOptLevel::Default,

‎llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -56,19 +56,15 @@ class Legalizer : public MachineFunctionPass {
5656
void getAnalysisUsage(AnalysisUsage &AU) const override;
5757

5858
MachineFunctionProperties getRequiredProperties() const override {
59-
return MachineFunctionProperties().set(
60-
MachineFunctionProperties::Property::IsSSA);
59+
return MachineFunctionProperties().setIsSSA();
6160
}
6261

6362
MachineFunctionProperties getSetProperties() const override {
64-
return MachineFunctionProperties().set(
65-
MachineFunctionProperties::Property::Legalized);
63+
return MachineFunctionProperties().setLegalized();
6664
}
6765

6866
MachineFunctionProperties getClearedProperties() const override {
69-
return MachineFunctionProperties()
70-
.set(MachineFunctionProperties::Property::NoPHIs)
71-
.set(MachineFunctionProperties::Property::NoVRegs);
67+
return MachineFunctionProperties().setNoPHIs().setNoVRegs();
7268
}
7369

7470
bool runOnMachineFunction(MachineFunction &MF) override;

‎llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -169,8 +169,7 @@ class LoadStoreOpt : public MachineFunctionPass {
169169
StringRef getPassName() const override { return "LoadStoreOpt"; }
170170

171171
MachineFunctionProperties getRequiredProperties() const override {
172-
return MachineFunctionProperties()
173-
.set(MachineFunctionProperties::Property::IsSSA);
172+
return MachineFunctionProperties().setIsSSA();
174173
}
175174

176175
void getAnalysisUsage(AnalysisUsage &AU) const override;

‎llvm/include/llvm/CodeGen/GlobalISel/Localizer.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,8 +85,7 @@ class Localizer : public MachineFunctionPass {
8585
StringRef getPassName() const override { return "Localizer"; }
8686

8787
MachineFunctionProperties getRequiredProperties() const override {
88-
return MachineFunctionProperties()
89-
.set(MachineFunctionProperties::Property::IsSSA);
88+
return MachineFunctionProperties().setIsSSA();
9089
}
9190

9291
void getAnalysisUsage(AnalysisUsage &AU) const override;

‎llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -624,19 +624,15 @@ class RegBankSelect : public MachineFunctionPass {
624624
void getAnalysisUsage(AnalysisUsage &AU) const override;
625625

626626
MachineFunctionProperties getRequiredProperties() const override {
627-
return MachineFunctionProperties()
628-
.set(MachineFunctionProperties::Property::IsSSA)
629-
.set(MachineFunctionProperties::Property::Legalized);
627+
return MachineFunctionProperties().setIsSSA().setLegalized();
630628
}
631629

632630
MachineFunctionProperties getSetProperties() const override {
633-
return MachineFunctionProperties().set(
634-
MachineFunctionProperties::Property::RegBankSelected);
631+
return MachineFunctionProperties().setRegBankSelected();
635632
}
636633

637634
MachineFunctionProperties getClearedProperties() const override {
638-
return MachineFunctionProperties()
639-
.set(MachineFunctionProperties::Property::NoPHIs);
635+
return MachineFunctionProperties().setNoPHIs();
640636
}
641637

642638
/// Check that our input is fully legal: we require the function to have the

‎llvm/include/llvm/CodeGen/IndirectThunks.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -157,8 +157,8 @@ void ThunkInserter<Derived, InsertedThunksTy>::createThunkFunction(
157157
// generate one. At least GlobalISel asserts if this invariant isn't
158158
// respected.
159159

160-
// Set MF properties. We never use vregs...
161-
MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
160+
// Set MF properties. We never use vregs.
161+
MF.getProperties().setNoVRegs();
162162
}
163163

164164
template <typename Derived, typename InsertedThunksTy>

‎llvm/include/llvm/CodeGen/LiveDebugVariables.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,7 @@ class LiveDebugVariablesWrapperLegacy : public MachineFunctionPass {
8888
void getAnalysisUsage(AnalysisUsage &) const override;
8989

9090
MachineFunctionProperties getSetProperties() const override {
91-
return MachineFunctionProperties().set(
92-
MachineFunctionProperties::Property::TracksDebugUserValues);
91+
return MachineFunctionProperties().setTracksDebugUserValues();
9392
}
9493
};
9594

@@ -102,8 +101,7 @@ class LiveDebugVariablesAnalysis
102101
using Result = LiveDebugVariables;
103102

104103
MachineFunctionProperties getSetProperties() const {
105-
return MachineFunctionProperties().set(
106-
MachineFunctionProperties::Property::TracksDebugUserValues);
104+
return MachineFunctionProperties().setTracksDebugUserValues();
107105
}
108106

109107
Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);

‎llvm/include/llvm/CodeGen/MachineCSE.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,7 @@ class MachineCSEPass : public PassInfoMixin<MachineCSEPass> {
1919
MachineFunctionAnalysisManager &MFAM);
2020

2121
MachineFunctionProperties getRequiredProperties() const {
22-
return MachineFunctionProperties().set(
23-
MachineFunctionProperties::Property::IsSSA);
22+
return MachineFunctionProperties().setIsSSA();
2423
}
2524
};
2625

‎llvm/include/llvm/CodeGen/MachineCopyPropagation.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,7 @@ class MachineCopyPropagationPass
2525
MachineFunctionAnalysisManager &MFAM);
2626

2727
MachineFunctionProperties getRequiredProperties() const {
28-
return MachineFunctionProperties().set(
29-
MachineFunctionProperties::Property::NoVRegs);
28+
return MachineFunctionProperties().setNoVRegs();
3029
}
3130
};
3231

‎llvm/include/llvm/CodeGen/MachineFunction.h

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,6 +214,25 @@ class MachineFunctionProperties {
214214
return *this;
215215
}
216216

217+
// Per property has/set/reset accessors.
218+
#define PPACCESSORS(X) \
219+
bool has##X() const { return hasProperty(Property::X); } \
220+
MachineFunctionProperties &set##X(void) { return set(Property::X); } \
221+
MachineFunctionProperties &reset##X(void) { return reset(Property::X); }
222+
223+
PPACCESSORS(IsSSA)
224+
PPACCESSORS(NoPHIs)
225+
PPACCESSORS(TracksLiveness)
226+
PPACCESSORS(NoVRegs)
227+
PPACCESSORS(FailedISel)
228+
PPACCESSORS(Legalized)
229+
PPACCESSORS(RegBankSelected)
230+
PPACCESSORS(Selected)
231+
PPACCESSORS(TiedOpsRewritten)
232+
PPACCESSORS(FailsVerification)
233+
PPACCESSORS(FailedRegAlloc)
234+
PPACCESSORS(TracksDebugUserValues)
235+
217236
/// Reset all the properties.
218237
MachineFunctionProperties &reset() {
219238
Properties.reset();

‎llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,7 @@ class MachineLateInstrsCleanupPass
1919
MachineFunctionAnalysisManager &MachineFunctionAM);
2020

2121
MachineFunctionProperties getRequiredProperties() const {
22-
return MachineFunctionProperties().set(
23-
MachineFunctionProperties::Property::NoVRegs);
22+
return MachineFunctionProperties().setNoVRegs();
2423
}
2524
};
2625

‎llvm/include/llvm/CodeGen/MachineRegisterInfo.h

Lines changed: 4 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -198,32 +198,23 @@ class MachineRegisterInfo {
198198
// The TwoAddressInstructionPass and PHIElimination passes take the machine
199199
// function out of SSA form when they introduce multiple defs per virtual
200200
// register.
201-
bool isSSA() const {
202-
return MF->getProperties().hasProperty(
203-
MachineFunctionProperties::Property::IsSSA);
204-
}
201+
bool isSSA() const { return MF->getProperties().hasIsSSA(); }
205202

206203
// leaveSSA - Indicates that the machine function is no longer in SSA form.
207-
void leaveSSA() {
208-
MF->getProperties().reset(MachineFunctionProperties::Property::IsSSA);
209-
}
204+
void leaveSSA() { MF->getProperties().resetIsSSA(); }
210205

211206
/// tracksLiveness - Returns true when tracking register liveness accurately.
212207
/// (see MachineFUnctionProperties::Property description for details)
213208
bool tracksLiveness() const {
214-
return MF->getProperties().hasProperty(
215-
MachineFunctionProperties::Property::TracksLiveness);
209+
return MF->getProperties().hasTracksLiveness();
216210
}
217211

218212
/// invalidateLiveness - Indicates that register liveness is no longer being
219213
/// tracked accurately.
220214
///
221215
/// This should be called by late passes that invalidate the liveness
222216
/// information.
223-
void invalidateLiveness() {
224-
MF->getProperties().reset(
225-
MachineFunctionProperties::Property::TracksLiveness);
226-
}
217+
void invalidateLiveness() { MF->getProperties().resetTracksLiveness(); }
227218

228219
/// Returns true if liveness for register class @p RC should be tracked at
229220
/// the subregister level.

‎llvm/include/llvm/CodeGen/PatchableFunction.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,7 @@ class PatchableFunctionPass : public PassInfoMixin<PatchableFunctionPass> {
1919
MachineFunctionAnalysisManager &MFAM);
2020

2121
MachineFunctionProperties getRequiredProperties() const {
22-
return MachineFunctionProperties().set(
23-
MachineFunctionProperties::Property::NoVRegs);
22+
return MachineFunctionProperties().setNoVRegs();
2423
}
2524
static bool isRequired() { return true; }
2625
};

‎llvm/include/llvm/CodeGen/PostRASchedulerList.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,7 @@ class PostRASchedulerPass : public PassInfoMixin<PostRASchedulerPass> {
2222
MachineFunctionAnalysisManager &MFAM);
2323

2424
MachineFunctionProperties getRequiredProperties() const {
25-
return MachineFunctionProperties().set(
26-
MachineFunctionProperties::Property::NoVRegs);
25+
return MachineFunctionProperties().setNoVRegs();
2726
}
2827
};
2928

‎llvm/include/llvm/CodeGen/ReachingDefAnalysis.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -172,9 +172,7 @@ class ReachingDefAnalysis : public MachineFunctionPass {
172172
bool runOnMachineFunction(MachineFunction &MF) override;
173173

174174
MachineFunctionProperties getRequiredProperties() const override {
175-
return MachineFunctionProperties().set(
176-
MachineFunctionProperties::Property::NoVRegs).set(
177-
MachineFunctionProperties::Property::TracksLiveness);
175+
return MachineFunctionProperties().setNoVRegs().setTracksLiveness();
178176
}
179177

180178
/// Re-run the analysis.

‎llvm/include/llvm/CodeGen/RegAllocFast.h

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -28,22 +28,19 @@ class RegAllocFastPass : public PassInfoMixin<RegAllocFastPass> {
2828
RegAllocFastPass(Options Opts = Options()) : Opts(std::move(Opts)) {}
2929

3030
MachineFunctionProperties getRequiredProperties() const {
31-
return MachineFunctionProperties().set(
32-
MachineFunctionProperties::Property::NoPHIs);
31+
return MachineFunctionProperties().setNoPHIs();
3332
}
3433

3534
MachineFunctionProperties getSetProperties() const {
3635
if (Opts.ClearVRegs) {
37-
return MachineFunctionProperties().set(
38-
MachineFunctionProperties::Property::NoVRegs);
36+
return MachineFunctionProperties().setNoVRegs();
3937
}
4038

4139
return MachineFunctionProperties();
4240
}
4341

4442
MachineFunctionProperties getClearedProperties() const {
45-
return MachineFunctionProperties().set(
46-
MachineFunctionProperties::Property::IsSSA);
43+
return MachineFunctionProperties().setIsSSA();
4744
}
4845

4946
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &);

‎llvm/include/llvm/CodeGen/RegAllocGreedyPass.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,13 +28,11 @@ class RAGreedyPass : public PassInfoMixin<RAGreedyPass> {
2828
PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM);
2929

3030
MachineFunctionProperties getRequiredProperties() const {
31-
return MachineFunctionProperties().set(
32-
MachineFunctionProperties::Property::NoPHIs);
31+
return MachineFunctionProperties().setNoPHIs();
3332
}
3433

3534
MachineFunctionProperties getClearedProperties() const {
36-
return MachineFunctionProperties().set(
37-
MachineFunctionProperties::Property::IsSSA);
35+
return MachineFunctionProperties().setIsSSA();
3836
}
3937

4038
void

‎llvm/include/llvm/CodeGen/RegisterCoalescerPass.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,7 @@ class RegisterCoalescerPass : public PassInfoMixin<RegisterCoalescerPass> {
1818
MachineFunctionAnalysisManager &MFAM);
1919

2020
MachineFunctionProperties getClearedProperties() const {
21-
return MachineFunctionProperties().set(
22-
MachineFunctionProperties::Property::IsSSA);
21+
return MachineFunctionProperties().setIsSSA();
2322
}
2423
};
2524

‎llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,7 @@ class RemoveLoadsIntoFakeUsesPass
2020
MachineFunctionAnalysisManager &MFAM);
2121

2222
MachineFunctionProperties getRequiredProperties() const {
23-
return MachineFunctionProperties().set(
24-
MachineFunctionProperties::Property::NoVRegs);
23+
return MachineFunctionProperties().setNoVRegs();
2524
}
2625
};
2726

‎llvm/include/llvm/CodeGen/ShrinkWrap.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,7 @@ class ShrinkWrapPass : public PassInfoMixin<ShrinkWrapPass> {
1919
MachineFunctionAnalysisManager &MFAM);
2020

2121
MachineFunctionProperties getRequiredProperties() const {
22-
return MachineFunctionProperties().set(
23-
MachineFunctionProperties::Property::NoVRegs);
22+
return MachineFunctionProperties().setNoVRegs();
2423
}
2524
};
2625

‎llvm/include/llvm/CodeGen/TailDuplication.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,7 @@ class EarlyTailDuplicatePass
2929
: public TailDuplicatePassBase<EarlyTailDuplicatePass, true> {
3030
public:
3131
MachineFunctionProperties getClearedProperties() const {
32-
return MachineFunctionProperties().set(
33-
MachineFunctionProperties::Property::NoPHIs);
32+
return MachineFunctionProperties().setNoPHIs();
3433
}
3534
};
3635

‎llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,7 @@ class TwoAddressInstructionPass
1919
PreservedAnalyses run(MachineFunction &MF,
2020
MachineFunctionAnalysisManager &MFAM);
2121
MachineFunctionProperties getSetProperties() const {
22-
return MachineFunctionProperties().set(
23-
MachineFunctionProperties::Property::TiedOpsRewritten);
22+
return MachineFunctionProperties().setTiedOpsRewritten();
2423
}
2524
};
2625

‎llvm/lib/CodeGen/BranchFolding.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -106,8 +106,7 @@ class BranchFolderLegacy : public MachineFunctionPass {
106106
}
107107

108108
MachineFunctionProperties getRequiredProperties() const override {
109-
return MachineFunctionProperties().set(
110-
MachineFunctionProperties::Property::NoPHIs);
109+
return MachineFunctionProperties().setNoPHIs();
111110
}
112111
};
113112

‎llvm/lib/CodeGen/BreakFalseDeps.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,8 +64,7 @@ class BreakFalseDeps : public MachineFunctionPass {
6464
bool runOnMachineFunction(MachineFunction &MF) override;
6565

6666
MachineFunctionProperties getRequiredProperties() const override {
67-
return MachineFunctionProperties().set(
68-
MachineFunctionProperties::Property::NoVRegs);
67+
return MachineFunctionProperties().setNoVRegs();
6968
}
7069

7170
private:

‎llvm/lib/CodeGen/FuncletLayout.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,7 @@ class FuncletLayout : public MachineFunctionPass {
2929

3030
bool runOnMachineFunction(MachineFunction &F) override;
3131
MachineFunctionProperties getRequiredProperties() const override {
32-
return MachineFunctionProperties().set(
33-
MachineFunctionProperties::Property::NoVRegs);
32+
return MachineFunctionProperties().setNoVRegs();
3433
}
3534
};
3635
}

‎llvm/lib/CodeGen/GlobalISel/Combiner.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -255,8 +255,7 @@ bool Combiner::tryDCE(MachineInstr &MI, MachineRegisterInfo &MRI) {
255255
bool Combiner::combineMachineInstrs() {
256256
// If the ISel pipeline failed, do not bother running this pass.
257257
// FIXME: Should this be here or in individual combiner passes.
258-
if (MF.getProperties().hasProperty(
259-
MachineFunctionProperties::Property::FailedISel))
258+
if (MF.getProperties().hasFailedISel())
260259
return false;
261260

262261
// We can't call this in the constructor because the derived class is

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