[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties #140002
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Add per-property has<Prop>/set<Prop>/reset<Prop> functions to MachineFunctionProperties.
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llvm:regalloc
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llvm:globalisel
llvm:SelectionDAG
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@llvm/pr-subscribers-llvm-regalloc @llvm/pr-subscribers-llvm-globalisel Author: Rahul Joshi (jurahul) ChangesAdd per-property has<Prop>/set<Prop>/reset<Prop> functions to MachineFunctionProperties. Patch is 60.26 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/140002.diff 69 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/BranchFoldingPass.h b/llvm/include/llvm/CodeGen/BranchFoldingPass.h
index 6ebef47252d25..ae07be28c5962 100644
--- a/llvm/include/llvm/CodeGen/BranchFoldingPass.h
+++ b/llvm/include/llvm/CodeGen/BranchFoldingPass.h
@@ -21,8 +21,7 @@ class BranchFolderPass : public PassInfoMixin<BranchFolderPass> {
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoPHIs);
+ return MachineFunctionProperties().setNoPHIs();
}
};
diff --git a/llvm/include/llvm/CodeGen/ExecutionDomainFix.h b/llvm/include/llvm/CodeGen/ExecutionDomainFix.h
index 7cec96bf2851a..6846a3dd84f7c 100644
--- a/llvm/include/llvm/CodeGen/ExecutionDomainFix.h
+++ b/llvm/include/llvm/CodeGen/ExecutionDomainFix.h
@@ -148,8 +148,7 @@ class ExecutionDomainFix : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &MF) override;
MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
private:
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
index 75f683764d165..894a289b3e6a3 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
@@ -41,14 +41,13 @@ class InstructionSelect : public MachineFunctionPass {
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties()
- .set(MachineFunctionProperties::Property::IsSSA)
- .set(MachineFunctionProperties::Property::Legalized)
- .set(MachineFunctionProperties::Property::RegBankSelected);
+ .setIsSSA()
+ .setLegalized()
+ .setRegBankSelected();
}
MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::Selected);
+ return MachineFunctionProperties().setSelected();
}
InstructionSelect(CodeGenOptLevel OL = CodeGenOptLevel::Default,
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h b/llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h
index 15bef84632b7a..4fcc935a75109 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h
@@ -56,19 +56,15 @@ class Legalizer : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
+ return MachineFunctionProperties().setIsSSA();
}
MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::Legalized);
+ return MachineFunctionProperties().setLegalized();
}
MachineFunctionProperties getClearedProperties() const override {
- return MachineFunctionProperties()
- .set(MachineFunctionProperties::Property::NoPHIs)
- .set(MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoPHIs().setNoVRegs();
}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
index 7990997835d01..b93a666ac664e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
@@ -169,8 +169,7 @@ class LoadStoreOpt : public MachineFunctionPass {
StringRef getPassName() const override { return "LoadStoreOpt"; }
MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties()
- .set(MachineFunctionProperties::Property::IsSSA);
+ return MachineFunctionProperties().setIsSSA();
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/Localizer.h b/llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
index 4fbff4d10f8ab..4c25c9c2a8345 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
@@ -85,8 +85,7 @@ class Localizer : public MachineFunctionPass {
StringRef getPassName() const override { return "Localizer"; }
MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties()
- .set(MachineFunctionProperties::Property::IsSSA);
+ return MachineFunctionProperties().setIsSSA();
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h b/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
index 46173ffd76b72..076c70d21bbdf 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
@@ -624,19 +624,15 @@ class RegBankSelect : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties()
- .set(MachineFunctionProperties::Property::IsSSA)
- .set(MachineFunctionProperties::Property::Legalized);
+ return MachineFunctionProperties().setIsSSA().setLegalized();
}
MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::RegBankSelected);
+ return MachineFunctionProperties().setRegBankSelected();
}
MachineFunctionProperties getClearedProperties() const override {
- return MachineFunctionProperties()
- .set(MachineFunctionProperties::Property::NoPHIs);
+ return MachineFunctionProperties().setNoPHIs();
}
/// Check that our input is fully legal: we require the function to have the
diff --git a/llvm/include/llvm/CodeGen/IndirectThunks.h b/llvm/include/llvm/CodeGen/IndirectThunks.h
index 6c16b326fedd0..c54df87aa8228 100644
--- a/llvm/include/llvm/CodeGen/IndirectThunks.h
+++ b/llvm/include/llvm/CodeGen/IndirectThunks.h
@@ -157,8 +157,8 @@ void ThunkInserter<Derived, InsertedThunksTy>::createThunkFunction(
// generate one. At least GlobalISel asserts if this invariant isn't
// respected.
- // Set MF properties. We never use vregs...
- MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
+ // Set MF properties. We never use vregs.
+ MF.getProperties().setNoVRegs();
}
template <typename Derived, typename InsertedThunksTy>
diff --git a/llvm/include/llvm/CodeGen/LiveDebugVariables.h b/llvm/include/llvm/CodeGen/LiveDebugVariables.h
index 2cb95f2c71ccd..9d737a8f66c92 100644
--- a/llvm/include/llvm/CodeGen/LiveDebugVariables.h
+++ b/llvm/include/llvm/CodeGen/LiveDebugVariables.h
@@ -88,8 +88,7 @@ class LiveDebugVariablesWrapperLegacy : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &) const override;
MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::TracksDebugUserValues);
+ return MachineFunctionProperties().setTracksDebugUserValues();
}
};
@@ -102,8 +101,7 @@ class LiveDebugVariablesAnalysis
using Result = LiveDebugVariables;
MachineFunctionProperties getSetProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::TracksDebugUserValues);
+ return MachineFunctionProperties().setTracksDebugUserValues();
}
Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
diff --git a/llvm/include/llvm/CodeGen/MachineCSE.h b/llvm/include/llvm/CodeGen/MachineCSE.h
index 16a313508547d..b2b0d414ae673 100644
--- a/llvm/include/llvm/CodeGen/MachineCSE.h
+++ b/llvm/include/llvm/CodeGen/MachineCSE.h
@@ -19,8 +19,7 @@ class MachineCSEPass : public PassInfoMixin<MachineCSEPass> {
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
+ return MachineFunctionProperties().setIsSSA();
}
};
diff --git a/llvm/include/llvm/CodeGen/MachineCopyPropagation.h b/llvm/include/llvm/CodeGen/MachineCopyPropagation.h
index 2fe26464b71b3..8355752e747c0 100644
--- a/llvm/include/llvm/CodeGen/MachineCopyPropagation.h
+++ b/llvm/include/llvm/CodeGen/MachineCopyPropagation.h
@@ -25,8 +25,7 @@ class MachineCopyPropagationPass
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
};
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index 30d414f0829e5..81428c6450529 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -214,6 +214,25 @@ class MachineFunctionProperties {
return *this;
}
+ // Per property has/set/reset accessors.
+#define PPACCESSORS(X) \
+ bool has##X() const { return hasProperty(Property::X); } \
+ MachineFunctionProperties &set##X(void) { return set(Property::X); } \
+ MachineFunctionProperties &reset##X(void) { return reset(Property::X); }
+
+ PPACCESSORS(IsSSA)
+ PPACCESSORS(NoPHIs)
+ PPACCESSORS(TracksLiveness)
+ PPACCESSORS(NoVRegs)
+ PPACCESSORS(FailedISel)
+ PPACCESSORS(Legalized)
+ PPACCESSORS(RegBankSelected)
+ PPACCESSORS(Selected)
+ PPACCESSORS(TiedOpsRewritten)
+ PPACCESSORS(FailsVerification)
+ PPACCESSORS(FailedRegAlloc)
+ PPACCESSORS(TracksDebugUserValues)
+
/// Reset all the properties.
MachineFunctionProperties &reset() {
Properties.reset();
diff --git a/llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h b/llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h
index 8a539eb1bb271..8562e1ad38a7e 100644
--- a/llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h
+++ b/llvm/include/llvm/CodeGen/MachineLateInstrsCleanup.h
@@ -19,8 +19,7 @@ class MachineLateInstrsCleanupPass
MachineFunctionAnalysisManager &MachineFunctionAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
};
diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
index f20f4b16a5f17..f6c7e4f4a4c8e 100644
--- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -198,21 +198,15 @@ class MachineRegisterInfo {
// The TwoAddressInstructionPass and PHIElimination passes take the machine
// function out of SSA form when they introduce multiple defs per virtual
// register.
- bool isSSA() const {
- return MF->getProperties().hasProperty(
- MachineFunctionProperties::Property::IsSSA);
- }
+ bool isSSA() const { return MF->getProperties().hasIsSSA(); }
// leaveSSA - Indicates that the machine function is no longer in SSA form.
- void leaveSSA() {
- MF->getProperties().reset(MachineFunctionProperties::Property::IsSSA);
- }
+ void leaveSSA() { MF->getProperties().resetIsSSA(); }
/// tracksLiveness - Returns true when tracking register liveness accurately.
/// (see MachineFUnctionProperties::Property description for details)
bool tracksLiveness() const {
- return MF->getProperties().hasProperty(
- MachineFunctionProperties::Property::TracksLiveness);
+ return MF->getProperties().hasTracksLiveness();
}
/// invalidateLiveness - Indicates that register liveness is no longer being
@@ -220,10 +214,7 @@ class MachineRegisterInfo {
///
/// This should be called by late passes that invalidate the liveness
/// information.
- void invalidateLiveness() {
- MF->getProperties().reset(
- MachineFunctionProperties::Property::TracksLiveness);
- }
+ void invalidateLiveness() { MF->getProperties().resetTracksLiveness(); }
/// Returns true if liveness for register class @p RC should be tracked at
/// the subregister level.
diff --git a/llvm/include/llvm/CodeGen/PatchableFunction.h b/llvm/include/llvm/CodeGen/PatchableFunction.h
index d81a92f9eef26..095e159010b6c 100644
--- a/llvm/include/llvm/CodeGen/PatchableFunction.h
+++ b/llvm/include/llvm/CodeGen/PatchableFunction.h
@@ -19,8 +19,7 @@ class PatchableFunctionPass : public PassInfoMixin<PatchableFunctionPass> {
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
static bool isRequired() { return true; }
};
diff --git a/llvm/include/llvm/CodeGen/PostRASchedulerList.h b/llvm/include/llvm/CodeGen/PostRASchedulerList.h
index 06043bed5c088..e450dc8101078 100644
--- a/llvm/include/llvm/CodeGen/PostRASchedulerList.h
+++ b/llvm/include/llvm/CodeGen/PostRASchedulerList.h
@@ -22,8 +22,7 @@ class PostRASchedulerPass : public PassInfoMixin<PostRASchedulerPass> {
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
};
diff --git a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
index 978e84b09a736..41ea462201ee5 100644
--- a/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
+++ b/llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
@@ -172,9 +172,7 @@ class ReachingDefAnalysis : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &MF) override;
MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs).set(
- MachineFunctionProperties::Property::TracksLiveness);
+ return MachineFunctionProperties().setNoVRegs().setTracksLiveness();
}
/// Re-run the analysis.
diff --git a/llvm/include/llvm/CodeGen/RegAllocFast.h b/llvm/include/llvm/CodeGen/RegAllocFast.h
index 83b9125dc07e9..d3a13e22fc8b1 100644
--- a/llvm/include/llvm/CodeGen/RegAllocFast.h
+++ b/llvm/include/llvm/CodeGen/RegAllocFast.h
@@ -28,22 +28,19 @@ class RegAllocFastPass : public PassInfoMixin<RegAllocFastPass> {
RegAllocFastPass(Options Opts = Options()) : Opts(std::move(Opts)) {}
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoPHIs);
+ return MachineFunctionProperties().setNoPHIs();
}
MachineFunctionProperties getSetProperties() const {
if (Opts.ClearVRegs) {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
return MachineFunctionProperties();
}
MachineFunctionProperties getClearedProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
+ return MachineFunctionProperties().setIsSSA();
}
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &);
diff --git a/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h b/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
index d2fd66f8da593..6b34ee3ff2543 100644
--- a/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
+++ b/llvm/include/llvm/CodeGen/RegAllocGreedyPass.h
@@ -28,13 +28,11 @@ class RAGreedyPass : public PassInfoMixin<RAGreedyPass> {
PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoPHIs);
+ return MachineFunctionProperties().setNoPHIs();
}
MachineFunctionProperties getClearedProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
+ return MachineFunctionProperties().setIsSSA();
}
void
diff --git a/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h b/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h
index 91f66dbf33b5f..7211d1e79306e 100644
--- a/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h
+++ b/llvm/include/llvm/CodeGen/RegisterCoalescerPass.h
@@ -18,8 +18,7 @@ class RegisterCoalescerPass : public PassInfoMixin<RegisterCoalescerPass> {
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getClearedProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
+ return MachineFunctionProperties().setIsSSA();
}
};
diff --git a/llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h b/llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h
index bbd5b8b430bf6..70cd2fe0c3cc4 100644
--- a/llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h
+++ b/llvm/include/llvm/CodeGen/RemoveLoadsIntoFakeUses.h
@@ -20,8 +20,7 @@ class RemoveLoadsIntoFakeUsesPass
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
};
diff --git a/llvm/include/llvm/CodeGen/ShrinkWrap.h b/llvm/include/llvm/CodeGen/ShrinkWrap.h
index 9035847a93dea..805924be306e8 100644
--- a/llvm/include/llvm/CodeGen/ShrinkWrap.h
+++ b/llvm/include/llvm/CodeGen/ShrinkWrap.h
@@ -19,8 +19,7 @@ class ShrinkWrapPass : public PassInfoMixin<ShrinkWrapPass> {
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getRequiredProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoVRegs);
+ return MachineFunctionProperties().setNoVRegs();
}
};
diff --git a/llvm/include/llvm/CodeGen/TailDuplication.h b/llvm/include/llvm/CodeGen/TailDuplication.h
index 687a592ccf2fb..d1cc4b0d065f0 100644
--- a/llvm/include/llvm/CodeGen/TailDuplication.h
+++ b/llvm/include/llvm/CodeGen/TailDuplication.h
@@ -29,8 +29,7 @@ class EarlyTailDuplicatePass
: public TailDuplicatePassBase<EarlyTailDuplicatePass, true> {
public:
MachineFunctionProperties getClearedProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoPHIs);
+ return MachineFunctionProperties().setNoPHIs();
}
};
diff --git a/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
index d4d47f29cc844..a51c7c99d9bb3 100644
--- a/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
+++ b/llvm/include/llvm/CodeGen/TwoAddressInstructionPass.h
@@ -19,8 +19,7 @@ class TwoAddressInstructionPass
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
MachineFunctionProperties getSetProperties() const {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::TiedOpsRewritten);
+ return MachineFunctionProperties().setTiedOpsRewritten();
}
};
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index 6f5afbd2a996a..d1663e0fbd544 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -106,8 +106,7 @@ class BranchFolderLegacy : public MachineFunctionPass {
}
MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(...
[truncated]
|
|
@arsenm @aemerson @s-barannikov WDYT? |
arsenm
approved these changes
May 21, 2025
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Add per-property has/set/reset functions to MachineFunctionProperties.