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11 files changed

+81
-64
lines changed

11 files changed

+81
-64
lines changed

‎llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -382,8 +382,14 @@ class LegalizationArtifactCombiner {
382382
assert(Opcode == TargetOpcode::G_ANYEXT || Opcode == TargetOpcode::G_ZEXT ||
383383
Opcode == TargetOpcode::G_SEXT);
384384

385-
if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF,
386-
MI.getOperand(1).getReg(), MRI)) {
385+
// FIXME: Two opcodes should be checked with one call instead.
386+
MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF,
387+
MI.getOperand(1).getReg(), MRI);
388+
if (!DefMI) {
389+
DefMI =
390+
getOpcodeDef(TargetOpcode::G_POISON, MI.getOperand(1).getReg(), MRI);
391+
}
392+
if (DefMI) {
387393
Builder.setInstr(MI);
388394
Register DstReg = MI.getOperand(0).getReg();
389395
LLT DstTy = MRI.getType(DstReg);
@@ -392,6 +398,8 @@ class LegalizationArtifactCombiner {
392398
// G_ANYEXT (G_IMPLICIT_DEF) -> G_IMPLICIT_DEF
393399
if (!isInstLegal({TargetOpcode::G_IMPLICIT_DEF, {DstTy}}))
394400
return false;
401+
if (!isInstLegal({TargetOpcode::G_POISON, {DstTy}}))
402+
return false;
395403
LLVM_DEBUG(dbgs() << ".. Combine G_ANYEXT(G_IMPLICIT_DEF): " << MI);
396404
auto Impl = Builder.buildUndef(DstTy);
397405
replaceRegOrBuildCopy(DstReg, Impl.getReg(0), MRI, Builder, UpdatedDefs,
@@ -951,8 +959,10 @@ class LegalizationArtifactCombiner {
951959
if (i - MergeStartIdx != EltUnmergeIdx - UnmergeIdxStart)
952960
return false;
953961
} else if (!AllowUndef ||
954-
MRI.getVRegDef(MI.getSourceReg(i))->getOpcode() !=
955-
TargetOpcode::G_IMPLICIT_DEF)
962+
(MRI.getVRegDef(MI.getSourceReg(i))->getOpcode() !=
963+
TargetOpcode::G_IMPLICIT_DEF &&
964+
MRI.getVRegDef(MI.getSourceReg(i))->getOpcode() !=
965+
TargetOpcode::G_POISON))
956966
return false;
957967
}
958968
return true;

‎llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -428,7 +428,8 @@ struct ImplicitDefMatch {
428428
bool match(const MachineRegisterInfo &MRI, Register Reg) {
429429
MachineInstr *TmpMI;
430430
if (mi_match(Reg, MRI, m_MInstr(TmpMI)))
431-
return TmpMI->getOpcode() == TargetOpcode::G_IMPLICIT_DEF;
431+
return TmpMI->getOpcode() == TargetOpcode::G_IMPLICIT_DEF ||
432+
TmpMI->getOpcode() == TargetOpcode::G_POISON;
432433
return false;
433434
}
434435
};

‎llvm/include/llvm/Target/GlobalISel/Combine.td

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -442,6 +442,7 @@ def unary_undef_to_undef_frags : GICombinePatFrag<
442442
[G_TRUNC, G_BITCAST, G_ANYEXT, G_PTRTOINT, G_INTTOPTR, G_FPTOSI,
443443
G_FPTOUI],
444444
(pattern (op $dst, $x), (G_IMPLICIT_DEF $x)))>;
445+
445446
def unary_undef_to_undef : GICombineRule<
446447
(defs root:$dst),
447448
(match (unary_undef_to_undef_frags $dst)),

‎llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -455,7 +455,7 @@ bool CombinerHelper::matchCombineShuffleConcat(
455455
return false;
456456
}
457457
if (!isLegalOrBeforeLegalizer(
458-
{TargetOpcode::G_IMPLICIT_DEF, {ConcatSrcTy}}) ||
458+
{TargetOpcode::G_IMPLICIT_DEF, {ConcatSrcTy}}) &&
459459
!isLegalOrBeforeLegalizer({TargetOpcode::G_POISON, {ConcatSrcTy}}))
460460
return false;
461461
Ops.push_back(0);
@@ -2307,7 +2307,8 @@ bool CombinerHelper::matchCombineUnmergeUndef(
23072307
B.buildUndef(DstReg);
23082308
}
23092309
};
2310-
return isa<GImplicitDef>(MRI.getVRegDef(SrcReg));
2310+
return isa<GImplicitDef>(MRI.getVRegDef(SrcReg)) ||
2311+
isa<GPoison>(MRI.getVRegDef(SrcReg));
23112312
}
23122313

23132314
bool CombinerHelper::matchCombineUnmergeWithDeadLanesToTrunc(
@@ -2733,6 +2734,7 @@ void CombinerHelper::applyCombineTruncOfShift(
27332734

27342735
bool CombinerHelper::matchAnyExplicitUseIsUndef(MachineInstr &MI) const {
27352736
return any_of(MI.explicit_uses(), [this](const MachineOperand &MO) {
2737+
// FIXME: Two opcodes should be checked with one call instead.
27362738
return MO.isReg() &&
27372739
(getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI) ||
27382740
getOpcodeDef(TargetOpcode::G_POISON, MO.getReg(), MRI));
@@ -2770,8 +2772,7 @@ bool CombinerHelper::matchUndefStore(MachineInstr &MI) const {
27702772
assert(MI.getOpcode() == TargetOpcode::G_STORE);
27712773
return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(0).getReg(),
27722774
MRI) ||
2773-
getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(0).getReg(),
2774-
MRI);
2775+
getOpcodeDef(TargetOpcode::G_POISON, MI.getOperand(0).getReg(), MRI);
27752776
}
27762777

27772778
bool CombinerHelper::matchPoisonStore(MachineInstr &MI) const {
@@ -2783,8 +2784,7 @@ bool CombinerHelper::matchUndefSelectCmp(MachineInstr &MI) const {
27832784
assert(MI.getOpcode() == TargetOpcode::G_SELECT);
27842785
return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(1).getReg(),
27852786
MRI) ||
2786-
getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(1).getReg(),
2787-
MRI);
2787+
getOpcodeDef(TargetOpcode::G_POISON, MI.getOperand(1).getReg(), MRI);
27882788
}
27892789

27902790
bool CombinerHelper::matchInsertExtractVecEltOutOfBounds(

‎llvm/lib/CodeGen/GlobalISel/CombinerHelperVectorOps.cpp

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,8 @@ bool CombinerHelper::matchExtractVectorElement(MachineInstr &MI,
7979
// Fold extractVectorElement(Vector, TOOLARGE) -> undef
8080
if (IndexC && VectorTy.isFixedVector() &&
8181
IndexC->uge(VectorTy.getNumElements()) &&
82-
isLegalOrBeforeLegalizer({TargetOpcode::G_IMPLICIT_DEF, {DstTy}})) {
82+
(isLegalOrBeforeLegalizer({TargetOpcode::G_IMPLICIT_DEF, {DstTy}}) ||
83+
isLegalOrBeforeLegalizer({TargetOpcode::G_POISON, {DstTy}}))) {
8384
// For fixed-length vectors, it's invalid to extract out-of-range elements.
8485
MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); };
8586
return true;
@@ -301,7 +302,8 @@ bool CombinerHelper::matchExtractVectorElementWithShuffleVector(
301302
LLT DstTy = MRI.getType(Dst);
302303

303304
if (SrcIdx < 0 &&
304-
isLegalOrBeforeLegalizer({TargetOpcode::G_IMPLICIT_DEF, {DstTy}})) {
305+
(isLegalOrBeforeLegalizer({TargetOpcode::G_IMPLICIT_DEF, {DstTy}}) ||
306+
isLegalOrBeforeLegalizer({TargetOpcode::G_POISON, {DstTy}}))) {
305307
MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); };
306308
return true;
307309
}
@@ -354,7 +356,8 @@ bool CombinerHelper::matchInsertVectorElementOOB(MachineInstr &MI,
354356
getIConstantVRegValWithLookThrough(Index, MRI);
355357

356358
if (MaybeIndex && MaybeIndex->Value.uge(DstTy.getNumElements()) &&
357-
isLegalOrBeforeLegalizer({TargetOpcode::G_IMPLICIT_DEF, {DstTy}})) {
359+
(isLegalOrBeforeLegalizer({TargetOpcode::G_IMPLICIT_DEF, {DstTy}}) ||
360+
isLegalOrBeforeLegalizer({TargetOpcode::G_POISON, {DstTy}}))) {
358361
MatchInfo = [=](MachineIRBuilder &B) { B.buildUndef(Dst); };
359362
return true;
360363
}

‎llvm/lib/CodeGen/GlobalISel/Utils.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1920,6 +1920,7 @@ static bool isGuaranteedNotToBeUndefOrPoison(Register Reg,
19201920
case TargetOpcode::G_FREEZE:
19211921
return true;
19221922
case TargetOpcode::G_POISON:
1923+
return !includesPoison(Kind);
19231924
case TargetOpcode::G_IMPLICIT_DEF:
19241925
return !includesUndef(Kind);
19251926
case TargetOpcode::G_CONSTANT:

‎llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -453,8 +453,8 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
453453
// Note: we only write S1 rules for G_IMPLICIT_DEF, G_POISON,
454454
// G_CONSTANT, G_FCONSTANT
455455
// and G_FREEZE here, rest is trivially regbankselected earlier
456-
addRulesForGOpcs({G_IMPLICIT_DEF, G_POISON})
457-
.Any({{UniS1}, {{Sgpr32Trunc}, {}}});
456+
addRulesForGOpcs({G_IMPLICIT_DEF}).Any({{UniS1}, {{Sgpr32Trunc}, {}}});
457+
addRulesForGOpcs({G_POISON}).Any({{UniS1}, {{Sgpr32Trunc}, {}}});
458458
addRulesForGOpcs({G_CONSTANT})
459459
.Any({{UniS1, _}, {{Sgpr32Trunc}, {None}, UniCstExt}});
460460
addRulesForGOpcs({G_FREEZE}).Any({{DivS1}, {{Vcc}, {Vcc}}});

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