Skip to content

Commit 71f3861

Browse files
davemgreendavemgreen
committed
Formatting and fixups
1 parent bb7072c commit 71f3861

17 files changed

+114
-101
lines changed

‎llvm/include/llvm/CodeGen/MachineFunction.h

Lines changed: 9 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1032,28 +1032,18 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
10321032
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
10331033
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
10341034
MachineMemOperand *getMachineMemOperand(
1035-
MachinePointerInfo PtrInfo, MachineMemOperand::Flags F, LocationSize TS,
1035+
MachinePointerInfo PtrInfo, MachineMemOperand::Flags F, LocationSize Size,
10361036
Align BaseAlignment, const AAMDNodes &AAInfo = AAMDNodes(),
10371037
const MDNode *Ranges = nullptr, SyncScope::ID SSID = SyncScope::System,
10381038
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
10391039
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
10401040
MachineMemOperand *getMachineMemOperand(
1041-
MachinePointerInfo PtrInfo, MachineMemOperand::Flags F, uint64_t TS,
1041+
MachinePointerInfo PtrInfo, MachineMemOperand::Flags F, uint64_t Size,
10421042
Align BaseAlignment, const AAMDNodes &AAInfo = AAMDNodes(),
10431043
const MDNode *Ranges = nullptr, SyncScope::ID SSID = SyncScope::System,
10441044
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
10451045
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic) {
1046-
return getMachineMemOperand(PtrInfo, F, LocationSize::precise(TS),
1047-
BaseAlignment, AAInfo, Ranges, SSID, Ordering,
1048-
FailureOrdering);
1049-
}
1050-
MachineMemOperand *getMachineMemOperand(
1051-
MachinePointerInfo PtrInfo, MachineMemOperand::Flags F, TypeSize TS,
1052-
Align BaseAlignment, const AAMDNodes &AAInfo = AAMDNodes(),
1053-
const MDNode *Ranges = nullptr, SyncScope::ID SSID = SyncScope::System,
1054-
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
1055-
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic) {
1056-
return getMachineMemOperand(PtrInfo, F, LocationSize::precise(TS),
1046+
return getMachineMemOperand(PtrInfo, F, LocationSize::precise(Size),
10571047
BaseAlignment, AAInfo, Ranges, SSID, Ordering,
10581048
FailureOrdering);
10591049
}
@@ -1065,30 +1055,26 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
10651055
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
10661056
int64_t Offset, LLT Ty);
10671057
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
1068-
int64_t Offset, LocationSize TS) {
1058+
int64_t Offset, LocationSize Size) {
10691059
return getMachineMemOperand(
10701060
MMO, Offset,
1071-
!TS.hasValue() ? LLT()
1072-
: TS.isScalable()
1073-
? LLT::scalable_vector(1, 8 * TS.getValue().getKnownMinValue())
1074-
: LLT::scalar(8 * TS.getValue().getKnownMinValue()));
1061+
!Size.hasValue() ? LLT()
1062+
: Size.isScalable()
1063+
? LLT::scalable_vector(1, 8 * Size.getValue().getKnownMinValue())
1064+
: LLT::scalar(8 * Size.getValue().getKnownMinValue()));
10751065
}
10761066
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
10771067
int64_t Offset, uint64_t Size) {
10781068
return getMachineMemOperand(MMO, Offset, LocationSize::precise(Size));
10791069
}
1080-
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
1081-
int64_t Offset, TypeSize Size) {
1082-
return getMachineMemOperand(MMO, Offset, LocationSize::precise(Size));
1083-
}
10841070

10851071
/// getMachineMemOperand - Allocate a new MachineMemOperand by copying
10861072
/// an existing one, replacing only the MachinePointerInfo and size.
10871073
/// MachineMemOperands are owned by the MachineFunction and need not be
10881074
/// explicitly deallocated.
10891075
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
10901076
const MachinePointerInfo &PtrInfo,
1091-
LocationSize TS);
1077+
LocationSize Size);
10921078
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
10931079
const MachinePointerInfo &PtrInfo,
10941080
LLT Ty);
@@ -1097,11 +1083,6 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
10971083
uint64_t Size) {
10981084
return getMachineMemOperand(MMO, PtrInfo, LocationSize::precise(Size));
10991085
}
1100-
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
1101-
const MachinePointerInfo &PtrInfo,
1102-
TypeSize Size) {
1103-
return getMachineMemOperand(MMO, PtrInfo, LocationSize::precise(Size));
1104-
}
11051086

11061087
/// Allocate a new MachineMemOperand by copying an existing one,
11071088
/// replacing only AliasAnalysis information. MachineMemOperands are owned

‎llvm/lib/CodeGen/MachineFunction.cpp

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -484,12 +484,16 @@ void MachineFunction::deleteMachineBasicBlock(MachineBasicBlock *MBB) {
484484
}
485485

486486
MachineMemOperand *MachineFunction::getMachineMemOperand(
487-
MachinePointerInfo PtrInfo, MachineMemOperand::Flags F, LocationSize TS,
487+
MachinePointerInfo PtrInfo, MachineMemOperand::Flags F, LocationSize Size,
488488
Align BaseAlignment, const AAMDNodes &AAInfo, const MDNode *Ranges,
489489
SyncScope::ID SSID, AtomicOrdering Ordering,
490490
AtomicOrdering FailureOrdering) {
491+
assert((!Size.hasValue() ||
492+
Size.getValue().getKnownMinValue() != ~UINT64_C(0)) &&
493+
"Unexpected an unknown size to be represented using "
494+
"LocationSize::beforeOrAfter()");
491495
return new (Allocator)
492-
MachineMemOperand(PtrInfo, F, TS, BaseAlignment, AAInfo, Ranges, SSID,
496+
MachineMemOperand(PtrInfo, F, Size, BaseAlignment, AAInfo, Ranges, SSID,
493497
Ordering, FailureOrdering);
494498
}
495499

@@ -506,9 +510,13 @@ MachineMemOperand *MachineFunction::getMachineMemOperand(
506510
MachineMemOperand *
507511
MachineFunction::getMachineMemOperand(const MachineMemOperand *MMO,
508512
const MachinePointerInfo &PtrInfo,
509-
LocationSize TS) {
513+
LocationSize Size) {
514+
assert((!Size.hasValue() ||
515+
Size.getValue().getKnownMinValue() != ~UINT64_C(0)) &&
516+
"Unexpected an unknown size to be represented using "
517+
"LocationSize::beforeOrAfter()");
510518
return new (Allocator)
511-
MachineMemOperand(PtrInfo, MMO->getFlags(), TS, MMO->getBaseAlign(),
519+
MachineMemOperand(PtrInfo, MMO->getFlags(), Size, MMO->getBaseAlign(),
512520
AAMDNodes(), nullptr, MMO->getSyncScopeID(),
513521
MMO->getSuccessOrdering(), MMO->getFailureOrdering());
514522
}

‎llvm/lib/CodeGen/MachineInstr.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1341,8 +1341,8 @@ static bool MemOperandsHaveAlias(const MachineFrameInfo &MFI, AAResults *AA,
13411341
assert((OffsetA >= 0) && "Negative MachineMemOperand offset");
13421342
assert((OffsetB >= 0) && "Negative MachineMemOperand offset");
13431343

1344-
// If Scalable Location Size has non-zero offset,
1345-
// Width + Offset does not work at the moment
1344+
// If Scalable Location Size has non-zero offset, Width + Offset does not work
1345+
// at the moment
13461346
if ((WidthA.isScalable() && OffsetA > 0) ||
13471347
(WidthB.isScalable() && OffsetB > 0))
13481348
return true;

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -24222,7 +24222,7 @@ static SDValue narrowExtractedVectorLoad(SDNode *Extract, SelectionDAG &DAG) {
2422224222
// TODO: Use "BaseIndexOffset" to make this more effective.
2422324223
SDValue NewAddr = DAG.getMemBasePlusOffset(Ld->getBasePtr(), Offset, DL);
2422424224

24225-
TypeSize StoreSize = VT.getStoreSize();
24225+
LocationSize StoreSize = LocationSize::precise(VT.getStoreSize());
2422624226
MachineFunction &MF = DAG.getMachineFunction();
2422724227
MachineMemOperand *MMO;
2422824228
if (Offset.isScalable()) {
@@ -27863,11 +27863,10 @@ bool DAGCombiner::mayAlias(SDNode *Op0, SDNode *Op1) const {
2786327863
if (const auto *LSN = dyn_cast<LSBaseSDNode>(N)) {
2786427864
int64_t Offset = 0;
2786527865
if (auto *C = dyn_cast<ConstantSDNode>(LSN->getOffset()))
27866-
Offset = (LSN->getAddressingMode() == ISD::PRE_INC)
27867-
? C->getSExtValue()
27868-
: (LSN->getAddressingMode() == ISD::PRE_DEC)
27869-
? -1 * C->getSExtValue()
27870-
: 0;
27866+
Offset = (LSN->getAddressingMode() == ISD::PRE_INC) ? C->getSExtValue()
27867+
: (LSN->getAddressingMode() == ISD::PRE_DEC)
27868+
? -1 * C->getSExtValue()
27869+
: 0;
2787127870
TypeSize Size = LSN->getMemoryVT().getStoreSize();
2787227871
return {LSN->isVolatile(), LSN->isAtomic(),
2787327872
LSN->getBasePtr(), Offset /*base offset*/,

‎llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -267,7 +267,9 @@ static MachineMemOperand *getStackAlignedMMO(SDValue StackPtr,
267267
auto &MFI = MF.getFrameInfo();
268268
int FI = cast<FrameIndexSDNode>(StackPtr)->getIndex();
269269
MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(MF, FI);
270-
uint64_t ObjectSize = isObjectScalable ? ~UINT64_C(0) : MFI.getObjectSize(FI);
270+
LocationSize ObjectSize = isObjectScalable
271+
? LocationSize::beforeOrAfterPointer()
272+
: LocationSize::precise(MFI.getObjectSize(FI));
271273
return MF.getMachineMemOperand(PtrInfo, MachineMemOperand::MOStore,
272274
ObjectSize, MFI.getObjectAlign(FI));
273275
}

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8555,7 +8555,7 @@ SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
85558555
if (PtrInfo.V.isNull())
85568556
PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr, Offset);
85578557

8558-
TypeSize Size = MemVT.getStoreSize();
8558+
LocationSize Size = LocationSize::precise(MemVT.getStoreSize());
85598559
MachineFunction &MF = getMachineFunction();
85608560
MachineMemOperand *MMO = MF.getMachineMemOperand(PtrInfo, MMOFlags, Size,
85618561
Alignment, AAInfo, Ranges);
@@ -8676,7 +8676,7 @@ SDValue SelectionDAG::getStore(SDValue Chain, const SDLoc &dl, SDValue Val,
86768676
PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr);
86778677

86788678
MachineFunction &MF = getMachineFunction();
8679-
TypeSize Size = Val.getValueType().getStoreSize();
8679+
LocationSize Size = LocationSize::precise(Val.getValueType().getStoreSize());
86808680
MachineMemOperand *MMO =
86818681
MF.getMachineMemOperand(PtrInfo, MMOFlags, Size, Alignment, AAInfo);
86828682
return getStore(Chain, dl, Val, Ptr, MMO);
@@ -8729,7 +8729,8 @@ SDValue SelectionDAG::getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
87298729

87308730
MachineFunction &MF = getMachineFunction();
87318731
MachineMemOperand *MMO = MF.getMachineMemOperand(
8732-
PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment, AAInfo);
8732+
PtrInfo, MMOFlags, LocationSize::precise(SVT.getStoreSize()), Alignment,
8733+
AAInfo);
87338734
return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
87348735
}
87358736

@@ -8823,7 +8824,7 @@ SDValue SelectionDAG::getLoadVP(
88238824
if (PtrInfo.V.isNull())
88248825
PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr, Offset);
88258826

8826-
TypeSize Size = MemVT.getStoreSize();
8827+
LocationSize Size = LocationSize::precise(MemVT.getStoreSize());
88278828
MachineFunction &MF = getMachineFunction();
88288829
MachineMemOperand *MMO = MF.getMachineMemOperand(PtrInfo, MMOFlags, Size,
88298830
Alignment, AAInfo, Ranges);
@@ -8976,7 +8977,8 @@ SDValue SelectionDAG::getTruncStoreVP(SDValue Chain, const SDLoc &dl,
89768977

89778978
MachineFunction &MF = getMachineFunction();
89788979
MachineMemOperand *MMO = MF.getMachineMemOperand(
8979-
PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment, AAInfo);
8980+
PtrInfo, MMOFlags, LocationSize::precise(SVT.getStoreSize()), Alignment,
8981+
AAInfo);
89808982
return getTruncStoreVP(Chain, dl, Val, Ptr, Mask, EVL, SVT, MMO,
89818983
IsCompressing);
89828984
}

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -3037,7 +3037,8 @@ static SDValue getLoadStackGuard(SelectionDAG &DAG, const SDLoc &DL,
30373037
auto Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant |
30383038
MachineMemOperand::MODereferenceable;
30393039
MachineMemOperand *MemRef = MF.getMachineMemOperand(
3040-
MPInfo, Flags, PtrTy.getSizeInBits() / 8, DAG.getEVTAlign(PtrTy));
3040+
MPInfo, Flags, LocationSize::precise(PtrTy.getSizeInBits() / 8),
3041+
DAG.getEVTAlign(PtrTy));
30413042
DAG.setNodeMemRefs(Node, {MemRef});
30423043
}
30433044
if (PtrTy != PtrMemTy)
@@ -5000,9 +5001,9 @@ void SelectionDAGBuilder::visitAtomicCmpXchg(const AtomicCmpXchgInst &I) {
50005001

50015002
MachineFunction &MF = DAG.getMachineFunction();
50025003
MachineMemOperand *MMO = MF.getMachineMemOperand(
5003-
MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(),
5004-
DAG.getEVTAlign(MemVT), AAMDNodes(), nullptr, SSID, SuccessOrdering,
5005-
FailureOrdering);
5004+
MachinePointerInfo(I.getPointerOperand()), Flags,
5005+
LocationSize::precise(MemVT.getStoreSize()), DAG.getEVTAlign(MemVT),
5006+
AAMDNodes(), nullptr, SSID, SuccessOrdering, FailureOrdering);
50065007

50075008
SDValue L = DAG.getAtomicCmpSwap(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS,
50085009
dl, MemVT, VTs, InChain,
@@ -5054,8 +5055,9 @@ void SelectionDAGBuilder::visitAtomicRMW(const AtomicRMWInst &I) {
50545055

50555056
MachineFunction &MF = DAG.getMachineFunction();
50565057
MachineMemOperand *MMO = MF.getMachineMemOperand(
5057-
MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(),
5058-
DAG.getEVTAlign(MemVT), AAMDNodes(), nullptr, SSID, Ordering);
5058+
MachinePointerInfo(I.getPointerOperand()), Flags,
5059+
LocationSize::precise(MemVT.getStoreSize()), DAG.getEVTAlign(MemVT),
5060+
AAMDNodes(), nullptr, SSID, Ordering);
50595061

50605062
SDValue L =
50615063
DAG.getAtomic(NT, dl, MemVT, InChain,
@@ -5100,8 +5102,9 @@ void SelectionDAGBuilder::visitAtomicLoad(const LoadInst &I) {
51005102
auto Flags = TLI.getLoadMemOperandFlags(I, DAG.getDataLayout(), AC, LibInfo);
51015103

51025104
MachineMemOperand *MMO = DAG.getMachineFunction().getMachineMemOperand(
5103-
MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(),
5104-
I.getAlign(), AAMDNodes(), nullptr, SSID, Order);
5105+
MachinePointerInfo(I.getPointerOperand()), Flags,
5106+
LocationSize::precise(MemVT.getStoreSize()), I.getAlign(), AAMDNodes(),
5107+
nullptr, SSID, Order);
51055108

51065109
InChain = TLI.prepareVolatileOrAtomicLoad(InChain, dl, DAG);
51075110

@@ -5137,8 +5140,9 @@ void SelectionDAGBuilder::visitAtomicStore(const StoreInst &I) {
51375140

51385141
MachineFunction &MF = DAG.getMachineFunction();
51395142
MachineMemOperand *MMO = MF.getMachineMemOperand(
5140-
MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(),
5141-
I.getAlign(), AAMDNodes(), nullptr, SSID, Ordering);
5143+
MachinePointerInfo(I.getPointerOperand()), Flags,
5144+
LocationSize::precise(MemVT.getStoreSize()), I.getAlign(), AAMDNodes(),
5145+
nullptr, SSID, Ordering);
51425146

51435147
SDValue Val = getValue(I.getValueOperand());
51445148
if (Val.getValueType() != MemVT)

‎llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2362,7 +2362,7 @@ bool AArch64LoadStoreOpt::tryToPairLdStInst(MachineBasicBlock::iterator &MBBI) {
23622362
// Get the needed alignments to check them if
23632363
// ldp-aligned-only/stp-aligned-only features are opted.
23642364
uint64_t MemAlignment = MemOp->getAlign().value();
2365-
uint64_t TypeAlignment = Align(MemOp->getSize()).value();
2365+
uint64_t TypeAlignment = Align(MemOp->getSize().getValue()).value();
23662366

23672367
if (MemAlignment < 2 * TypeAlignment) {
23682368
NumFailedAlignmentCheck++;

‎llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3550,7 +3550,9 @@ bool AMDGPUDAGToDAGISel::isUniformLoad(const SDNode *N) const {
35503550
if (N->isDivergent() && !AMDGPUInstrInfo::isUniformMMO(MMO))
35513551
return false;
35523552

3553-
return Ld->getAlign() >= Align(std::min(MMO->getSize().getValue().getKnownMinValue(), uint64_t(4))) &&
3553+
return Ld->getAlign() >=
3554+
Align(std::min(MMO->getSize().getValue().getKnownMinValue(),
3555+
uint64_t(4))) &&
35543556
((Ld->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS ||
35553557
Ld->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT) ||
35563558
(Subtarget->getScalarizeGlobalBehavior() &&

‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -422,10 +422,9 @@ bool SIInstrInfo::getMemOperandsWithOffsetWidth(
422422
DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst);
423423
if (DataOpIdx == -1) {
424424
DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data0);
425-
unsigned Width2 = getOpSize(LdSt, DataOpIdx);
425+
Width = getOpSize(LdSt, DataOpIdx);
426426
DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data1);
427-
Width2 += getOpSize(LdSt, DataOpIdx);
428-
Width = LocationSize::precise(Width2);
427+
Width = Width.getValue() + getOpSize(LdSt, DataOpIdx);
429428
} else {
430429
Width = getOpSize(LdSt, DataOpIdx);
431430
}

‎llvm/lib/Target/Mips/MipsInstructionSelector.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -456,7 +456,8 @@ bool MipsInstructionSelector::select(MachineInstr &I) {
456456
}
457457

458458
// Unaligned memory access
459-
if ((!MMO->getSize().hasValue() || MMO->getAlign() < MMO->getSize().getValue()) &&
459+
if ((!MMO->getSize().hasValue() ||
460+
MMO->getAlign() < MMO->getSize().getValue()) &&
460461
!STI.systemSupportsUnalignedAccess()) {
461462
if (MMO->getSize() != 4 || !isRegInGprb(I.getOperand(0).getReg(), MRI))
462463
return false;

‎llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,8 @@ class MipsPreLegalizerCombinerImpl : public Combiner {
7070
// subtarget doesn't support them.
7171
auto MMO = *MI.memoperands_begin();
7272
const MipsSubtarget &STI = MI.getMF()->getSubtarget<MipsSubtarget>();
73-
if (!MMO->getSize().hasValue() || !isPowerOf2_64(MMO->getSize().getValue()))
73+
if (!MMO->getSize().hasValue() ||
74+
!isPowerOf2_64(MMO->getSize().getValue()))
7475
return false;
7576
bool isUnaligned = MMO->getAlign() < MMO->getSize().getValue();
7677
if (!STI.systemSupportsUnalignedAccess() && isUnaligned)

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 18 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10309,9 +10309,15 @@ RISCVTargetLowering::lowerFixedLengthVectorLoadToRVV(SDValue Op,
1030910309
RISCVTargetLowering::computeVLMAXBounds(ContainerVT, Subtarget);
1031010310
if (MinVLMAX == MaxVLMAX && MinVLMAX == VT.getVectorNumElements() &&
1031110311
getLMUL1VT(ContainerVT).bitsLE(ContainerVT)) {
10312+
MachineMemOperand *MMO = Load->getMemOperand();
10313+
MachineFunction &MF = DAG.getMachineFunction();
10314+
MMO = MF.getMachineMemOperand(
10315+
MMO, MMO->getPointerInfo(),
10316+
MMO->getMemoryType().isValid()
10317+
? LLT::scalable_vector(1, MMO->getMemoryType().getSizeInBits())
10318+
: MMO->getMemoryType());
1031210319
SDValue NewLoad =
10313-
DAG.getLoad(ContainerVT, DL, Load->getChain(), Load->getBasePtr(),
10314-
Load->getMemOperand());
10320+
DAG.getLoad(ContainerVT, DL, Load->getChain(), Load->getBasePtr(), MMO);
1031510321
SDValue Result = convertFromScalableVector(VT, NewLoad, DAG, Subtarget);
1031610322
return DAG.getMergeValues({Result, NewLoad.getValue(1)}, DL);
1031710323
}
@@ -10369,9 +10375,17 @@ RISCVTargetLowering::lowerFixedLengthVectorStoreToRVV(SDValue Op,
1036910375
const auto [MinVLMAX, MaxVLMAX] =
1037010376
RISCVTargetLowering::computeVLMAXBounds(ContainerVT, Subtarget);
1037110377
if (MinVLMAX == MaxVLMAX && MinVLMAX == VT.getVectorNumElements() &&
10372-
getLMUL1VT(ContainerVT).bitsLE(ContainerVT))
10378+
getLMUL1VT(ContainerVT).bitsLE(ContainerVT)) {
10379+
MachineMemOperand *MMO = Store->getMemOperand();
10380+
MachineFunction &MF = DAG.getMachineFunction();
10381+
MMO = MF.getMachineMemOperand(
10382+
MMO, MMO->getPointerInfo(),
10383+
MMO->getMemoryType().isValid()
10384+
? LLT::scalable_vector(1, MMO->getMemoryType().getSizeInBits())
10385+
: MMO->getMemoryType());
1037310386
return DAG.getStore(Store->getChain(), DL, NewValue, Store->getBasePtr(),
10374-
Store->getMemOperand());
10387+
MMO);
10388+
}
1037510389

1037610390
SDValue VL = getVLOp(VT.getVectorNumElements(), ContainerVT, DL, DAG,
1037710391
Subtarget);

0 commit comments

Comments
 (0)