@@ -1485,3 +1485,182 @@ define i4 @PR96857_xor_without_noundef(i4 %val0, i4 %val1, i4 %val2) {
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%val7 = xor i4 %val4 , %val6
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ret i4 %val7
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}
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+
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+ define i32 @or_disjoint_with_xor (i32 %a , i32 %b ) {
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+ ; CHECK-LABEL: @or_disjoint_with_xor(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: ret i32 [[B:%.*]]
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+ ;
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+ entry:
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+ %or = or disjoint i32 %a , %b
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+ %xor = xor i32 %or , %a
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+ ret i32 %xor
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+ }
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+
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+ define i32 @xor_with_or_disjoint_ab (i32 %a , i32 %b ) {
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+ ; CHECK-LABEL: @xor_with_or_disjoint_ab(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: ret i32 [[B:%.*]]
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+ ;
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+ entry:
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+ %or = or disjoint i32 %a , %b
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+ %xor = xor i32 %a , %or
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+ ret i32 %xor
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+ }
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+
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+ define i32 @xor_with_or_disjoint_ba (i32 %a , i32 %b ) {
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+ ; CHECK-LABEL: @xor_with_or_disjoint_ba(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: ret i32 [[B:%.*]]
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+ ;
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+ entry:
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+ %or = or disjoint i32 %b , %a
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+ %xor = xor i32 %b , %or
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+ ret i32 %xor
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+ }
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+
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+ define <2 x i32 > @or_disjoint_with_xor_vec (<2 x i32 > %a , < 2 x i32 > %b ) {
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+ ; CHECK-LABEL: @or_disjoint_with_xor_vec(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: ret <2 x i32> [[B:%.*]]
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+ ;
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+ entry:
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+ %or = or disjoint <2 x i32 > %a , %b
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+ %xor = xor <2 x i32 > %or , %a
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+ ret <2 x i32 > %xor
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+ }
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+
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+ define <2 x i32 > @xor_with_or_disjoint_vec (<2 x i32 > %a , < 2 x i32 > %b ) {
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+ ; CHECK-LABEL: @xor_with_or_disjoint_vec(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: ret <2 x i32> [[B:%.*]]
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+ ;
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+ entry:
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+ %or = or disjoint <2 x i32 > %a , %b
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+ %xor = xor <2 x i32 > %a , %or
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+ ret <2 x i32 > %xor
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+ }
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+
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+ define i32 @select_or_disjoint_xor (i32 %a , i1 %c ) {
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+ ; CHECK-LABEL: @select_or_disjoint_xor(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[S:%.*]] = select i1 [[C:%.*]], i32 0, i32 4
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+ ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[A:%.*]], 4
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+ ; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[S]], [[SHL]]
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+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[OR]], 4
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+ ; CHECK-NEXT: ret i32 [[XOR]]
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+ ;
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+ entry:
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+ %s = select i1 %c , i32 0 , i32 4
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+ %shl = shl i32 %a , 4
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+ %or = or disjoint i32 %s , %shl
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+ %xor = xor i32 %or , 4
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+ ret i32 %xor
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+ }
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+
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+ define <2 x i32 > @select_or_disjoint_xor_vec (<2 x i32 > %a , i1 %c ) {
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+ ; CHECK-LABEL: @select_or_disjoint_xor_vec(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[S:%.*]] = select i1 [[C:%.*]], <2 x i32> zeroinitializer, <2 x i32> <i32 4, i32 4>
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+ ; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[A:%.*]], <i32 4, i32 4>
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+ ; CHECK-NEXT: [[OR:%.*]] = or disjoint <2 x i32> [[S]], [[SHL]]
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+ ; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[OR]], <i32 4, i32 4>
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+ ; CHECK-NEXT: ret <2 x i32> [[XOR]]
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+ ;
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+ entry:
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+ %s = select i1 %c , <2 x i32 > <i32 0 , i32 0 >, <2 x i32 > <i32 4 , i32 4 >
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+ %shl = shl <2 x i32 > %a , <i32 4 , i32 4 >
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+ %or = or <2 x i32 > %s , %shl
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+ %xor = xor <2 x i32 > %or , <i32 4 , i32 4 >
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+ ret <2 x i32 > %xor
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+ }
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+
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+ define i32 @select_or_disjoint_or (i32 %a , i1 %c ) {
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+ ; CHECK-LABEL: @select_or_disjoint_or(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[S:%.*]] = select i1 [[C:%.*]], i32 0, i32 4
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+ ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[A:%.*]], 4
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+ ; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[S]], [[SHL]]
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+ ; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[OR]], 4
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+ ; CHECK-NEXT: ret i32 [[ADD]]
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+ ;
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+ entry:
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+ %s = select i1 %c , i32 0 , i32 4
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+ %shl = shl i32 %a , 4
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+ %or = or disjoint i32 %s , %shl
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+ %add = add i32 %or , 4
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+ ret i32 %add
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+ }
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+
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+ define <2 x i32 > @select_or_disjoint_or_vec (<2 x i32 > %a , i1 %c ) {
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+ ; CHECK-LABEL: @select_or_disjoint_or_vec(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[S:%.*]] = select i1 [[C:%.*]], <2 x i32> zeroinitializer, <2 x i32> <i32 4, i32 4>
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+ ; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[A:%.*]], <i32 4, i32 4>
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+ ; CHECK-NEXT: [[OR:%.*]] = or disjoint <2 x i32> [[S]], [[SHL]]
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+ ; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw <2 x i32> [[OR]], <i32 4, i32 4>
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+ ; CHECK-NEXT: ret <2 x i32> [[ADD]]
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+ ;
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+ entry:
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+ %s = select i1 %c , <2 x i32 > <i32 0 , i32 0 >, <2 x i32 > <i32 4 , i32 4 >
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+ %shl = shl <2 x i32 > %a , <i32 4 , i32 4 >
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+ %or = or <2 x i32 > %s , %shl
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+ %add = add <2 x i32 > %or , <i32 4 , i32 4 >
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+ ret <2 x i32 > %add
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+ }
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+
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+ define i32 @or_multi_use_disjoint_with_xor (i32 %a , i32 %b , i32 %c ) {
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+ ; CHECK-LABEL: @or_multi_use_disjoint_with_xor(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[A:%.*]], [[B:%.*]]
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+ ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[OR]], [[C:%.*]]
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+ ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[OR]], [[XOR]]
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+ ; CHECK-NEXT: ret i32 [[ADD]]
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+ ;
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+ entry:
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+ %or = or disjoint i32 %a , %b
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+ %xor = xor i32 %or , %c
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+ %add = add i32 %or , %xor
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+ ret i32 %add
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+ }
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+
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+ define <2 x i32 > @or_multi_use_disjoint_with_xor_vec (<2 x i32 > %a , <2 x i32 > %b , <2 x i32 > %c ) {
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+ ; CHECK-LABEL: @or_multi_use_disjoint_with_xor_vec(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[OR:%.*]] = or disjoint <2 x i32> [[A:%.*]], [[B:%.*]]
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+ ; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i32> [[OR]], [[C:%.*]]
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+ ; CHECK-NEXT: [[ADD:%.*]] = add <2 x i32> [[OR]], [[XOR]]
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+ ; CHECK-NEXT: ret <2 x i32> [[ADD]]
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+ ;
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+ entry:
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+ %or = or disjoint <2 x i32 > %a , %b
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+ %xor = xor <2 x i32 > %or , %c
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+ %add = add <2 x i32 > %or , %xor
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+ ret <2 x i32 > %add
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+ }
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+
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+ define i32 @add_with_or (i32 %a , i32 %b , i32 %c ) {
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+ ; CHECK-LABEL: @add_with_or(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
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+ ; CHECK-NEXT: [[OR:%.*]] = or i32 [[ADD]], [[C:%.*]]
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+ ; CHECK-NEXT: ret i32 [[OR]]
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+ ;
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+ entry:
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+ %add = add i32 %a , %b
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+ %or = or i32 %add , %c
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+ ret i32 %or
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+ }
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+
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+ define <2 x i32 > @add_with_or_vec (<2 x i32 > %a , <2 x i32 > %b , <2 x i32 > %c ) {
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+ ; CHECK-LABEL: @add_with_or_vec(
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+ ; CHECK-NEXT: entry:
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+ ; CHECK-NEXT: [[ADD:%.*]] = add <2 x i32> [[A:%.*]], [[B:%.*]]
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+ ; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ADD]], [[C:%.*]]
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+ ; CHECK-NEXT: ret <2 x i32> [[OR]]
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+ ;
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+ entry:
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+ %add = add <2 x i32 > %a , %b
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+ %or = or <2 x i32 > %add , %c
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+ ret <2 x i32 > %or
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+ }
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