Missed Optimization: comparing the result of a disjoint or with a constant can be simplified

[Cancelll]

godbolt: https://godbolt.org/z/KhbTx6jM5
Alive2: https://alive2.llvm.org/ce/z/dYuU3i

define i1 @src1(ptr readonly captures(none) %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds nuw i8, ptr %0, i64 1
  %3 = load i8, ptr %2, align 1
  %4 = zext i8 %3 to i32
  %5 = shl nuw nsw i32 %4, 8
  %6 = getelementptr inbounds nuw i8, ptr %0, i64 2
  %7 = load i8, ptr %6, align 1
  %8 = zext i8 %7 to i32
  %9 = or disjoint i32 %5, %8
  %10 = icmp ne i32 %9, 256
  ret i1 %10
}

define i1 @tgt1(ptr readonly captures(none) %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds nuw i8, ptr %0, i64 1
  %3 = load i8, ptr %2, align 1
  %4 = getelementptr inbounds nuw i8, ptr %0, i64 2
  %5 = load i8, ptr %4, align 1
  %6 = icmp ne i8 %3, 1
  %7 = icmp ne i8 %5, 0
  %8 = or i1 %6, %7
  ret i1 %8
}

define i1 @src2(ptr readonly captures(none) %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds nuw i8, ptr %0, i64 8
  %3 = load i8, ptr %2, align 1
  %4 = zext i8 %3 to i16
  %5 = shl nuw i16 %4, 8
  %6 = getelementptr inbounds nuw i8, ptr %0, i64 9
  %7 = load i8, ptr %6, align 1
  %8 = zext i8 %7 to i16
  %9 = or disjoint i16 %5, %8
  %.not103170.i = icmp eq i16 %9, 0
  ret i1 %.not103170.i
}

define i1 @tgt2(ptr readonly captures(none) %0) local_unnamed_addr #0 {
  %2 = getelementptr inbounds nuw i8, ptr %0, i64 8
  %3 = load i8, ptr %2, align 1
  %4 = getelementptr inbounds nuw i8, ptr %0, i64 9
  %5 = load i8, ptr %4, align 1
  %6 = or i8 %5, %3
  %.not103170.i = icmp eq i8 %6, 0
  ret i1 %.not103170.i
}

The first pattern is found here: https://github.com/dtcxzyw/llvm-opt-benchmark/blob/4eda6e7d8f48cfd3eadcc8778a1a557e670e2f08/bench/openssl/optimized/bad_dtls_test.ll#L685-L693
The second pattern is found here: https://github.com/dtcxzyw/llvm-opt-benchmark/blob/4eda6e7d8f48cfd3eadcc8778a1a557e670e2f08/bench/curl/optimized/doh.ll#L1139-L1147
Although in this case, the result of or disjoint is used else where, and thus probably cannot be optimized.

[dtcxzyw]

It may prevent AggressiveInstCombine from merging consecutive loads.
BTW, a special case of this pattern (with comparison to zero) has been handled by #137875.