Description
llvm-project/llvm/lib/IR/Value.cpp:711: const llvm::Value *llvm::Value::stripAndAccumulateConstantOffsets(const llvm::DataLayout &, llvm::APInt &, bool, bool, function_ref<bool (llvm::Value &, llvm::APInt &)>) const: Assertion `BitWidth == DL.getIndexTypeSizeInBits(getType()) && "The offset bit width does not match the DL specification."' failed.
llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Lines 1567 to 1568 in 1a4dc18
DL.getTypeSizeInBits is used, but inside stripAndAccumulateInBoundsConstantOffsets function:
llvm-project/llvm/lib/IR/Value.cpp
Line 723 in 1a4dc18
DL.getIndexTypeSizeInBits is used for assertion. If the DataLayout of an address space p[n]:<size>:<abi>[:<pref>][:<idx>] has different size and idx, the assertion would fail.
Is this intended? the type size and index size has to match here?