[X86][AVX2] X86FixupVectorConstantsPass - performance regression

[nurmukhametov]

Moving ISPC from LLVM 18 to LLVM 20, I have encountered performance regression for a few of our benchmarks for ISPC target avx2 (corresponds to -mcpu=haswell). It seems to be caused by #122601. It is around ~20-25%, as measured on Intel CPUs i9-12900 and 8360Y.

Compiler explorer link: https://godbolt.org/z/qx8s6K6br

[nurmukhametov]

@RKSimon, could you take a look? It's not clear to me whether it is expected or not.

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Aleksei Nurmukhametov (nurmukhametov)

Moving ISPC from LLVM 18 to LLVM 20, I have encountered performance regression for a few of our benchmarks for ISPC target avx2 (corresponds to `-mcpu=haswell`). It seems to be caused by #122601. It is around ~20-25%, as measured on Intel CPUs i9-12900 and 8360Y.

Compiler explorer link: https://godbolt.org/z/qx8s6K6br

[RKSimon]

AFAICT Haswell and later do have free domain crossing from VPMOVSXBD loads to fp-domain.

What could be happening is increased Port5 pressure, @phoebewang any thoughts?

https://clang.godbolt.org/z/5dTdbP1xG

[phoebewang]

AFAICT Haswell and later do have free domain crossing from VPMOVSXBD loads to fp-domain.

What could be happening is increased Port5 pressure, @phoebewang any thoughts?

https://clang.godbolt.org/z/5dTdbP1xG

Yeah, I think the Port5 is the reason, especially for 256-bit. Note, the binary is running actually on Alderlake, which has 0.3 RT on VMOVAPS compared with 1 on VPMOVSXBD.

[RKSimon]

I'm going to look at making this scheduler model driven like we do for X86FixupInstTuningPass

[RKSimon]

@nurmukhametov I've started #140028 to investigate this - are you able to test the patch in ISPC to see if we're on the right path?