Open
Description
Bugzilla Link | 50132 |
Version | trunk |
OS | Linux |
Attachments | The LLVM IR file converted from wasm bytecodes |
CC | @qcolombet |
Extended Description
Hi,
We are developing WebAssembly runtime which uses LLVM as the JIT/AOT codegen backend for ARC CPU, and the runtime JIT/AOT compiler converts wasm bytecodes into LLVM IR, runs optimization passes and finally calls LLVMTargetMachineEmitToFile API to emit the Assembly file. And when calling LLVMTargetMachineEmitToFile for some case, if the opt level is larger than LLVMCodeGenLevelNone, crash occurs and the following error is reported:
LLVM ERROR: Error while trying to spill R4 from class G#32 : Cannot scavenge register without an emergency spill slot!
For opt level LLVMCodeGenLevelNone, and for other CPU e.g. X86_64 and ARM, it is OK.
I uploaded the LLVM IR file, could you please help have a check? Thanks.