Description
Bugzilla Link | 50718 |
Version | trunk |
OS | Linux |
Attachments | IR test file, test C file |
CC | @qcolombet |
Extended Description
This was found while working on #49991 , which deals with various combinations of aggregates and how registers are assigned to them with FastIsel on AArch64.
I didn't find any issue with GlobalIsel apart from whenever we would need to return by stack.
If you try to return a type like this:
%T1 = type { double, double, double, double, double, double, double, double, double }
When we try to lower the return we run out of D registers (0-7 is allowed for argument passing and return) and so fail and there appears to be no fallback path to put the argument on the stack.
(though I'm unfamiliar with globalisel so maybe I have some strict mode on, and it could fall back somehow)
./bin/llc -mtriple=aarch64-none-linux-gnu -o - test.ll -global-isel
LLVM ERROR: unable to translate instruction: ret (in function: return_argument_1)
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: /home/david.spickett/build-llvm-aarch64/bin/llc -mtriple=aarch64-none-linux-gnu -o - /home/david.spickett/llvm-project/llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll -global-isel
-
Running pass 'Function Pass Manager' on module '/home/david.spickett/llvm-project/llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll'.
-
Running pass 'IRTranslator' on function '@return_argument_1'
#0 0x0000aaaac0e2e2c8 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/david.spickett/llvm-project/llvm/lib/Support/Unix/Signals.inc:565:0
Aborted (core dumped)
If you have 8 items in the type it uses d0-d7 registers as expected.
If you try to do the same thing from C it works probably because something else transforms the IR so you don't have to ask for 9 registers.
Godbolt with both examples: https://godbolt.org/z/3j7qoPvhf (files also attached)