[MIPS] Backend Bugs

[witbring]

I separate the bug report #67787 since the report has distinct bugs

The subsequent issue was identified within Clang v16.0.0.

Operand Type Check Bug

Clang changes a memory operand as an immediate value in the case of bc1tl, bc1fl, jal, jalx and j instructions.

$ cat buggy3.s
    bc1tl (1)
    bc1fl (2)
    jal (3)
    jalx (4)
    j (5)

$ ./bin/clang -c --target=mips buggy3.s -o buggy3.o

$ objdump -d buggy3.o

00000000 <.text>:
   0:	45030000 	bc1tl	0x4
   4:	00000000 	nop
   8:	45020000 	bc1fl	0xc
   c:	00000000 	nop
  10:	0c000000 	jal	0x0
  14:	00000000 	nop
  18:	74000001 	jalx	0x4
  1c:	00000000 	nop
  20:	08000001 	j	0x4
  24:	00000000 	nop

[llvmbot]

@llvm/issue-subscribers-backend-mips

I separate the bug report #67787 since the report has distinct bugs

The subsequent issue was identified within Clang v16.0.0.

Operand Type Check Bug

Clang changes a memory operand as an immediate value in the case of bc1tl, bc1fl, jal, jalx and j instructions.

$ cat buggy3.s
    bc1tl (1)
    bc1fl (2)
    jal (3)
    jalx (4)
    j (5)

$ ./bin/clang -c --target=mips buggy3.s -o buggy3.o

$ objdump -d buggy3.o

00000000 <.text>:
   0:	45030000 	bc1tl	0x4
   4:	00000000 	nop
   8:	45020000 	bc1fl	0xc
   c:	00000000 	nop
  10:	0c000000 	jal	0x0
  14:	00000000 	nop
  18:	74000001 	jalx	0x4
  1c:	00000000 	nop
  20:	08000001 	j	0x4
  24:	00000000 	nop

[brad0]

@FlyGoat @wzssyqa Ping.

[wzssyqa]

gas complains as

nn.s: Assembler messages:
nn.s:2: Error: branch to misaligned address (0x1)
nn.s:3: Error: branch to misaligned address (0x2)
nn.s:4: Warning: no .cprestore pseudo-op used in PIC code
nn.s:6: Error: branch to misaligned address (0x5)
nn.s: Internal error (Segmentation fault).
Please report this bug.

[wzssyqa]

The real problem is that the assembler for MIPS doesn't support use IMM as the target of branch.
In fact gas generates bad binary also:
https://sourceware.org/bugzilla/show_bug.cgi?id=31343

[witbring]

Thank you for replay. :)
I believe that an assembler ought to generate an error message whenever encountering invalid syntax.

[wzssyqa]

Yes. We have 2 choice now:

1. Add the support of IMM, as the ISA documents style;
2. Just disable this style. In fact we can use something like B . + 8.

[witbring]

Could you provide a clearer explanation?
What exactly do you mean by 'Add the support of IMM'?

[FlyGoat]

@wzssyqa FYI as per my reading of MIPSpro Assembly Language Programmer’s Guide offset operand of branch instructions can only be a label (or label based expression).

However for jump intrusions it should allow arbitrary address.

http://irix7.com/techpubs/007-2418-004.pdf

[FlyGoat]

Could you provide a clearer explanation? What exactly do you mean by 'Add the support of IMM'?

I guess Yunqiang means support immediate value as memory offset properly.

[witbring]

In that case, we should take relocation into consideration.