[llvm] Construct SmallVector with ArrayRef (NFC) #101872
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backend:Hexagon
backend:X86
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@llvm/pr-subscribers-backend-hexagon @llvm/pr-subscribers-llvm-support Author: Kazu Hirata (kazutakahirata) ChangesFull diff: https://github.com/llvm/llvm-project/pull/101872.diff 26 Files Affected:
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 899c5041aba4d..d208a710bb27f 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -1389,7 +1389,7 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
bool IsUnary = isa<UndefValue>(Operands[1]);
NumSubElts = VecSrcTy->getElementCount().getKnownMinValue();
- SmallVector<int, 16> AdjustMask(Mask.begin(), Mask.end());
+ SmallVector<int, 16> AdjustMask(Mask);
// Widening shuffle - widening the source(s) to the new length
// (treated as free - see above), and then perform the adjusted
diff --git a/llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h b/llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h
index 24a4accab845a..5a84fac5f5903 100644
--- a/llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h
+++ b/llvm/include/llvm/DebugInfo/CodeView/TypeRecord.h
@@ -669,8 +669,7 @@ class BuildInfoRecord : public TypeRecord {
BuildInfoRecord() = default;
explicit BuildInfoRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
BuildInfoRecord(ArrayRef<TypeIndex> ArgIndices)
- : TypeRecord(TypeRecordKind::BuildInfo),
- ArgIndices(ArgIndices.begin(), ArgIndices.end()) {}
+ : TypeRecord(TypeRecordKind::BuildInfo), ArgIndices(ArgIndices) {}
ArrayRef<TypeIndex> getArgs() const { return ArgIndices; }
diff --git a/llvm/include/llvm/FuzzMutate/RandomIRBuilder.h b/llvm/include/llvm/FuzzMutate/RandomIRBuilder.h
index 1a422fcc0be6e..af6d7216b77b5 100644
--- a/llvm/include/llvm/FuzzMutate/RandomIRBuilder.h
+++ b/llvm/include/llvm/FuzzMutate/RandomIRBuilder.h
@@ -43,7 +43,7 @@ struct RandomIRBuilder {
uint64_t MinFunctionNum = 1;
RandomIRBuilder(int Seed, ArrayRef<Type *> AllowedTypes)
- : Rand(Seed), KnownTypes(AllowedTypes.begin(), AllowedTypes.end()) {}
+ : Rand(Seed), KnownTypes(AllowedTypes) {}
// TODO: Try to make this a bit less of a random mishmash of functions.
diff --git a/llvm/include/llvm/IR/DebugInfoMetadata.h b/llvm/include/llvm/IR/DebugInfoMetadata.h
index c0b518b68b557..e8fdc0bacc663 100644
--- a/llvm/include/llvm/IR/DebugInfoMetadata.h
+++ b/llvm/include/llvm/IR/DebugInfoMetadata.h
@@ -3946,7 +3946,7 @@ class DIArgList : public Metadata, ReplaceableMetadataImpl {
DIArgList(LLVMContext &Context, ArrayRef<ValueAsMetadata *> Args)
: Metadata(DIArgListKind, Uniqued), ReplaceableMetadataImpl(Context),
- Args(Args.begin(), Args.end()) {
+ Args(Args) {
track();
}
~DIArgList() { untrack(); }
diff --git a/llvm/include/llvm/IR/Metadata.h b/llvm/include/llvm/IR/Metadata.h
index 7b54c74fb1b9d..495db79362f09 100644
--- a/llvm/include/llvm/IR/Metadata.h
+++ b/llvm/include/llvm/IR/Metadata.h
@@ -1489,8 +1489,7 @@ class MDTuple : public MDNode {
TempMDTuple cloneImpl() const {
ArrayRef<MDOperand> Operands = operands();
- return getTemporary(getContext(), SmallVector<Metadata *, 4>(
- Operands.begin(), Operands.end()));
+ return getTemporary(getContext(), SmallVector<Metadata *, 4>(Operands));
}
public:
diff --git a/llvm/include/llvm/MC/MCFragment.h b/llvm/include/llvm/MC/MCFragment.h
index bfd349e8b8e7e..87465bcfa5d67 100644
--- a/llvm/include/llvm/MC/MCFragment.h
+++ b/llvm/include/llvm/MC/MCFragment.h
@@ -513,8 +513,7 @@ class MCCVDefRangeFragment : public MCEncodedFragmentWithFixups<32, 4> {
ArrayRef<std::pair<const MCSymbol *, const MCSymbol *>> Ranges,
StringRef FixedSizePortion)
: MCEncodedFragmentWithFixups<32, 4>(FT_CVDefRange, false),
- Ranges(Ranges.begin(), Ranges.end()),
- FixedSizePortion(FixedSizePortion) {}
+ Ranges(Ranges), FixedSizePortion(FixedSizePortion) {}
ArrayRef<std::pair<const MCSymbol *, const MCSymbol *>> getRanges() const {
return Ranges;
diff --git a/llvm/include/llvm/ProfileData/MemProf.h b/llvm/include/llvm/ProfileData/MemProf.h
index cee8e5ef4c25d..892865a0a26fe 100644
--- a/llvm/include/llvm/ProfileData/MemProf.h
+++ b/llvm/include/llvm/ProfileData/MemProf.h
@@ -352,7 +352,7 @@ struct IndexedAllocationInfo {
IndexedAllocationInfo(ArrayRef<FrameId> CS, CallStackId CSId,
const MemInfoBlock &MB,
const MemProfSchema &Schema = getFullSchema())
- : CallStack(CS.begin(), CS.end()), CSId(CSId), Info(MB, Schema) {}
+ : CallStack(CS), CSId(CSId), Info(MB, Schema) {}
// Returns the size in bytes when this allocation info struct is serialized.
size_t serializedSize(const MemProfSchema &Schema,
diff --git a/llvm/include/llvm/Support/GenericDomTree.h b/llvm/include/llvm/Support/GenericDomTree.h
index e05e5f0f842e3..e9ebfd426648e 100644
--- a/llvm/include/llvm/Support/GenericDomTree.h
+++ b/llvm/include/llvm/Support/GenericDomTree.h
@@ -574,7 +574,7 @@ class DominatorTreeBase {
// The PostViewCFG is created with updates reversed (equivalent to changes
// made to the CFG), so the PreViewCFG needs all the updates reverse
// applied.
- SmallVector<UpdateType> AllUpdates(Updates.begin(), Updates.end());
+ SmallVector<UpdateType> AllUpdates(Updates);
append_range(AllUpdates, PostViewUpdates);
GraphDiff<NodePtr, IsPostDom> PreViewCFG(AllUpdates,
/*ReverseApplyUpdates=*/true);
diff --git a/llvm/include/llvm/Support/ScopedPrinter.h b/llvm/include/llvm/Support/ScopedPrinter.h
index 675c0ea4457cf..419ab97366796 100644
--- a/llvm/include/llvm/Support/ScopedPrinter.h
+++ b/llvm/include/llvm/Support/ScopedPrinter.h
@@ -161,7 +161,7 @@ class ScopedPrinter {
void printFlags(StringRef Label, T Value, ArrayRef<EnumEntry<TFlag>> Flags,
TFlag EnumMask1 = {}, TFlag EnumMask2 = {},
TFlag EnumMask3 = {}, ArrayRef<FlagEntry> ExtraFlags = {}) {
- SmallVector<FlagEntry, 10> SetFlags(ExtraFlags.begin(), ExtraFlags.end());
+ SmallVector<FlagEntry, 10> SetFlags(ExtraFlags);
for (const auto &Flag : Flags) {
if (Flag.Value == 0)
diff --git a/llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp b/llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
index 0d7eb7da8d6b6..e908be4ad5127 100644
--- a/llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
@@ -807,7 +807,7 @@ MDNode *AAMDNodes::extendToTBAA(MDNode *MD, ssize_t Len) {
// Otherwise, create TBAA with the new Len
ArrayRef<MDOperand> MDOperands = MD->operands();
- SmallVector<Metadata *, 4> NextNodes(MDOperands.begin(), MDOperands.end());
+ SmallVector<Metadata *, 4> NextNodes(MDOperands);
ConstantInt *PreviousSize = mdconst::extract<ConstantInt>(NextNodes[3]);
// Don't create a new MDNode if it is the same length.
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 285284dc27071..2b7611c48d99e 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -6122,7 +6122,7 @@ static Value *BuildSubAggregate(Value *From, ArrayRef<unsigned> idx_range,
Type *IndexedType = ExtractValueInst::getIndexedType(From->getType(),
idx_range);
Value *To = PoisonValue::get(IndexedType);
- SmallVector<unsigned, 10> Idxs(idx_range.begin(), idx_range.end());
+ SmallVector<unsigned, 10> Idxs(idx_range);
unsigned IdxSkip = Idxs.size();
return BuildSubAggregate(From, To, IndexedType, Idxs, IdxSkip, InsertBefore);
diff --git a/llvm/lib/IR/Attributes.cpp b/llvm/lib/IR/Attributes.cpp
index b2fdd218e5d4b..abd05e316bec1 100644
--- a/llvm/lib/IR/Attributes.cpp
+++ b/llvm/lib/IR/Attributes.cpp
@@ -1040,7 +1040,7 @@ AttributeSetNode::AttributeSetNode(ArrayRef<Attribute> Attrs)
AttributeSetNode *AttributeSetNode::get(LLVMContext &C,
ArrayRef<Attribute> Attrs) {
- SmallVector<Attribute, 8> SortedAttrs(Attrs.begin(), Attrs.end());
+ SmallVector<Attribute, 8> SortedAttrs(Attrs);
llvm::sort(SortedAttrs);
return getSorted(C, SortedAttrs);
}
diff --git a/llvm/lib/IR/DebugInfoMetadata.cpp b/llvm/lib/IR/DebugInfoMetadata.cpp
index 3440fcf711c78..416cebbe52723 100644
--- a/llvm/lib/IR/DebugInfoMetadata.cpp
+++ b/llvm/lib/IR/DebugInfoMetadata.cpp
@@ -1861,7 +1861,7 @@ DIExpression *DIExpression::appendOpsToArg(const DIExpression *Expr,
[](auto Op) { return Op.getOp() == dwarf::DW_OP_LLVM_arg; })) {
assert(ArgNo == 0 &&
"Location Index must be 0 for a non-variadic expression.");
- SmallVector<uint64_t, 8> NewOps(Ops.begin(), Ops.end());
+ SmallVector<uint64_t, 8> NewOps(Ops);
return DIExpression::prependOpcodes(Expr, NewOps, StackValue);
}
diff --git a/llvm/lib/Linker/IRMover.cpp b/llvm/lib/Linker/IRMover.cpp
index beab194a52b81..3a6c2678cd157 100644
--- a/llvm/lib/Linker/IRMover.cpp
+++ b/llvm/lib/Linker/IRMover.cpp
@@ -1371,8 +1371,7 @@ Error IRLinker::linkModuleFlagsMetadata() {
return dyn_cast<MDTuple>(DstValue);
ArrayRef<MDOperand> DstOperands = DstValue->operands();
MDTuple *New = MDTuple::getDistinct(
- DstM.getContext(),
- SmallVector<Metadata *, 4>(DstOperands.begin(), DstOperands.end()));
+ DstM.getContext(), SmallVector<Metadata *, 4>(DstOperands));
Metadata *FlagOps[] = {DstOp->getOperand(0), ID, New};
MDNode *Flag = MDTuple::getDistinct(DstM.getContext(), FlagOps);
DstModFlags->setOperand(DstIndex, Flag);
diff --git a/llvm/lib/Object/BuildID.cpp b/llvm/lib/Object/BuildID.cpp
index ef21458060abd..d3c58a919731f 100644
--- a/llvm/lib/Object/BuildID.cpp
+++ b/llvm/lib/Object/BuildID.cpp
@@ -50,7 +50,7 @@ BuildID llvm::object::parseBuildID(StringRef Str) {
return {};
ArrayRef<uint8_t> BuildID(reinterpret_cast<const uint8_t *>(Bytes.data()),
Bytes.size());
- return SmallVector<uint8_t>(BuildID.begin(), BuildID.end());
+ return SmallVector<uint8_t>(BuildID);
}
BuildIDRef llvm::object::getBuildID(const ObjectFile *Obj) {
diff --git a/llvm/lib/Support/SourceMgr.cpp b/llvm/lib/Support/SourceMgr.cpp
index 6eaa8783a5319..3f97213d86c05 100644
--- a/llvm/lib/Support/SourceMgr.cpp
+++ b/llvm/lib/Support/SourceMgr.cpp
@@ -382,7 +382,7 @@ SMDiagnostic::SMDiagnostic(const SourceMgr &sm, SMLoc L, StringRef FN, int Line,
ArrayRef<SMFixIt> Hints)
: SM(&sm), Loc(L), Filename(std::string(FN)), LineNo(Line), ColumnNo(Col),
Kind(Kind), Message(Msg), LineContents(LineStr), Ranges(Ranges.vec()),
- FixIts(Hints.begin(), Hints.end()) {
+ FixIts(Hints) {
llvm::sort(FixIts);
}
diff --git a/llvm/lib/Support/VirtualFileSystem.cpp b/llvm/lib/Support/VirtualFileSystem.cpp
index ce2bf2b4193a5..9d21eba9df635 100644
--- a/llvm/lib/Support/VirtualFileSystem.cpp
+++ b/llvm/lib/Support/VirtualFileSystem.cpp
@@ -591,7 +591,7 @@ class CombiningDirIterImpl : public llvm::vfs::detail::DirIterImpl {
CombiningDirIterImpl(ArrayRef<directory_iterator> DirIters,
std::error_code &EC)
- : IterList(DirIters.begin(), DirIters.end()) {
+ : IterList(DirIters) {
EC = incrementImpl(true);
}
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index 7aeaebc584c64..856c952e785da 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -2274,7 +2274,7 @@ HexagonTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG)
// Normalize the mask so that the first non-negative index comes from
// the first operand.
- SmallVector<int,8> Mask(AM.begin(), AM.end());
+ SmallVector<int, 8> Mask(AM);
unsigned F = llvm::find_if(AM, [](int M) { return M >= 0; }) - AM.data();
if (F == AM.size())
return DAG.getUNDEF(VecTy);
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
index 39b8c829a0b21..dd951d7eb8b54 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
@@ -1725,7 +1725,7 @@ HexagonTargetLowering::LowerHvxConcatVectors(SDValue Op, SelectionDAG &DAG)
return DAG.getNode(HexagonISD::QCAT, dl, VecTy, Op0, Op.getOperand(1));
ArrayRef<SDUse> U(Op.getNode()->ops());
- SmallVector<SDValue,4> SV(U.begin(), U.end());
+ SmallVector<SDValue, 4> SV(U);
ArrayRef<SDValue> Ops(SV);
MVT HalfTy = typeSplit(VecTy).first;
@@ -2128,7 +2128,7 @@ SDValue
HexagonTargetLowering::LowerHvxIntrinsic(SDValue Op, SelectionDAG &DAG) const {
const SDLoc &dl(Op);
unsigned IntNo = Op.getConstantOperandVal(0);
- SmallVector<SDValue> Ops(Op->ops().begin(), Op->ops().end());
+ SmallVector<SDValue> Ops(Op->ops());
auto Swap = [&](SDValue P) {
return DAG.getMergeValues({P.getValue(1), P.getValue(0)}, dl);
@@ -3589,7 +3589,7 @@ HexagonTargetLowering::PerformHvxDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
SDValue Op(N, 0);
unsigned Opc = Op.getOpcode();
- SmallVector<SDValue, 4> Ops(N->ops().begin(), N->ops().end());
+ SmallVector<SDValue, 4> Ops(N->ops());
if (Opc == ISD::TRUNCATE)
return combineTruncateBeforeLegal(Op, DCI);
diff --git a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
index 847646a00a9f6..2e66c81c33244 100644
--- a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
@@ -2691,7 +2691,7 @@ auto HexagonVectorCombine::joinVectorElements(IRBuilderBase &Builder,
// joins, the shuffles will hopefully be folded into a perfect shuffle.
// The output will need to be sign-extended to a type with element width
// being a power-of-2 anyways.
- SmallVector<Value *> Inputs(Values.begin(), Values.end());
+ SmallVector<Value *> Inputs(Values);
unsigned ToWidth = ToType->getScalarSizeInBits();
unsigned Width = Inputs.front()->getType()->getScalarSizeInBits();
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9fafb66ab0b3f..97ac6af00ad6d 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4295,7 +4295,7 @@ static SDValue getAVX512Node(unsigned Opcode, const SDLoc &DL, MVT VT,
DstVT = MVT::getVectorVT(SVT, 512 / SVT.getSizeInBits());
// Canonicalize src operands.
- SmallVector<SDValue> SrcOps(Ops.begin(), Ops.end());
+ SmallVector<SDValue> SrcOps(Ops);
for (SDValue &Op : SrcOps) {
MVT OpVT = Op.getSimpleValueType();
// Just pass through scalar operands.
@@ -39298,7 +39298,7 @@ static SDValue combineX86ShuffleChainWithExtract(
// Attempt to peek through inputs and adjust mask when we extract from an
// upper subvector.
int AdjustedMasks = 0;
- SmallVector<SDValue, 4> WideInputs(Inputs.begin(), Inputs.end());
+ SmallVector<SDValue, 4> WideInputs(Inputs);
for (unsigned I = 0; I != NumInputs; ++I) {
SDValue &Input = WideInputs[I];
Input = peekThroughBitcasts(Input);
@@ -39983,8 +39983,7 @@ static SDValue combineX86ShufflesRecursively(
HasVariableMask |= IsOpVariableMask;
// Update the list of shuffle nodes that have been combined so far.
- SmallVector<const SDNode *, 16> CombinedNodes(SrcNodes.begin(),
- SrcNodes.end());
+ SmallVector<const SDNode *, 16> CombinedNodes(SrcNodes);
CombinedNodes.push_back(Op.getNode());
// See if we can recurse into each shuffle source op (if it's a target
diff --git a/llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp b/llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
index 6f8ce174ea4da..07389a5ffb2b8 100644
--- a/llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
+++ b/llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
@@ -312,7 +312,7 @@ int llvm::libDriverMain(ArrayRef<const char *> ArgsArr) {
StringSaver Saver(Alloc);
// Parse command line arguments.
- SmallVector<const char *, 20> NewArgs(ArgsArr.begin(), ArgsArr.end());
+ SmallVector<const char *, 20> NewArgs(ArgsArr);
cl::ExpandResponseFiles(Saver, cl::TokenizeWindowsCommandLine, NewArgs);
ArgsArr = NewArgs;
diff --git a/llvm/tools/dsymutil/MachODebugMapParser.cpp b/llvm/tools/dsymutil/MachODebugMapParser.cpp
index e28c976d6ace3..c390d0b874948 100644
--- a/llvm/tools/dsymutil/MachODebugMapParser.cpp
+++ b/llvm/tools/dsymutil/MachODebugMapParser.cpp
@@ -32,9 +32,8 @@ class MachODebugMapParser {
ArrayRef<std::string> DSYMSearchPaths,
StringRef PathPrefix = "", StringRef VariantSuffix = "",
bool Verbose = false)
- : BinaryPath(std::string(BinaryPath)), Archs(Archs.begin(), Archs.end()),
- DSYMSearchPaths(DSYMSearchPaths.begin(), DSYMSearchPaths.end()),
- PathPrefix(std::string(PathPrefix)),
+ : BinaryPath(std::string(BinaryPath)), Archs(Archs),
+ DSYMSearchPaths(DSYMSearchPaths), PathPrefix(std::string(PathPrefix)),
VariantSuffix(std::string(VariantSuffix)), BinHolder(VFS, Verbose),
CurrentDebugMapObject(nullptr), SkipDebugMapObject(false) {}
diff --git a/llvm/tools/llvm-rc/ResourceScriptStmt.h b/llvm/tools/llvm-rc/ResourceScriptStmt.h
index 0d8ec3e5b7875..8f099202c0b47 100644
--- a/llvm/tools/llvm-rc/ResourceScriptStmt.h
+++ b/llvm/tools/llvm-rc/ResourceScriptStmt.h
@@ -875,7 +875,7 @@ class VersionInfoResource : public RCResource {
VersionInfoFixed() : IsTypePresent(FtNumTypes, false) {}
void setValue(VersionInfoFixedType Type, ArrayRef<uint32_t> Value) {
- FixedInfo[Type] = SmallVector<uint32_t, 4>(Value.begin(), Value.end());
+ FixedInfo[Type] = SmallVector<uint32_t, 4>(Value);
IsTypePresent[Type] = true;
}
diff --git a/llvm/unittests/Analysis/VectorUtilsTest.cpp b/llvm/unittests/Analysis/VectorUtilsTest.cpp
index 48b4d37558af1..fca1ecff9ea8d 100644
--- a/llvm/unittests/Analysis/VectorUtilsTest.cpp
+++ b/llvm/unittests/Analysis/VectorUtilsTest.cpp
@@ -607,8 +607,7 @@ class VFShapeAPITest : public testing::Test {
}
bool validParams(ArrayRef<VFParameter> Parameters) {
- Shape.Parameters =
- SmallVector<VFParameter, 8>(Parameters.begin(), Parameters.end());
+ Shape.Parameters = SmallVector<VFParameter, 8>(Parameters);
return Shape.hasValidParameterList();
}
};
diff --git a/llvm/unittests/Support/VirtualFileSystemTest.cpp b/llvm/unittests/Support/VirtualFileSystemTest.cpp
index 9e9b4fbcdedd4..d4717ce18eafc 100644
--- a/llvm/unittests/Support/VirtualFileSystemTest.cpp
+++ b/llvm/unittests/Support/VirtualFileSystemTest.cpp
@@ -766,7 +766,7 @@ TEST(VirtualFileSystemTest, BrokenSymlinkRealFSRecursiveIteration) {
template <typename DirIter>
static void checkContents(DirIter I, ArrayRef<StringRef> ExpectedOut) {
std::error_code EC;
- SmallVector<StringRef, 4> Expected(ExpectedOut.begin(), ExpectedOut.end());
+ SmallVector<StringRef, 4> Expected(ExpectedOut);
SmallVector<std::string, 4> InputToCheck;
// Do not rely on iteration order to check for contents, sort both
|
JDevlieghere
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to swiftlang/llvm-project
that referenced
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Oct 22, 2024
(cherry picked from commit 7df9da7)
JDevlieghere
pushed a commit
to swiftlang/llvm-project
that referenced
this pull request
Dec 16, 2024
(cherry picked from commit 7df9da7)
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