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[VectorCombine] Fix trunc generated between PHINodes #108228

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Merged
merged 1 commit into from
Sep 12, 2024
Merged

[VectorCombine] Fix trunc generated between PHINodes #108228

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8 changes: 6 additions & 2 deletions llvm/lib/Transforms/Vectorize/VectorCombine.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2652,8 +2652,12 @@ bool VectorCombine::shrinkType(llvm::Instruction &I) {
return false;

Value *Op0 = ZExted;
if (auto *OI = dyn_cast<Instruction>(OtherOperand))
Builder.SetInsertPoint(OI->getNextNode());
if (auto *OI = dyn_cast<Instruction>(OtherOperand)) {
if (isa<PHINode>(OI))
Builder.SetInsertPoint(OI->getParent()->getFirstInsertionPt());
else
Builder.SetInsertPoint(OI->getNextNode());
}
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You need to use getInsertionPointAfterDef() to handle all the edge cases correctly (I'd expect you will handle invoke and catchswitch incorrectly right now). Or even better yet, just don't do this and create all the instructions at &I. From a cursory look I don't see a need to create this instruction in a different place.

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You are right. I think I was worried that trunc might get swept inside the loop but LICM follows not so long after VectorCombine

#108398

Value *Op1 = Builder.CreateTrunc(OtherOperand, SmallTy);
Builder.SetInsertPoint(&I);
// Keep the order of operands the same
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27 changes: 27 additions & 0 deletions llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
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Expand Up @@ -73,4 +73,31 @@ entry:
ret i32 %6
}

define i32 @phi_bug(<16 x i32> %a, ptr %b) {
; CHECK-LABEL: @phi_bug(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[B:%.*]], align 1
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
; CHECK: vector.body:
; CHECK-NEXT: [[A_PHI:%.*]] = phi <16 x i32> [ [[A:%.*]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[WIDE_LOAD_PHI:%.*]] = phi <16 x i8> [ [[WIDE_LOAD]], [[ENTRY]] ]
; CHECK-NEXT: [[TMP0:%.*]] = trunc <16 x i32> [[A_PHI]] to <16 x i8>
; CHECK-NEXT: [[TMP1:%.*]] = and <16 x i8> [[WIDE_LOAD_PHI]], [[TMP0]]
; CHECK-NEXT: [[TMP2:%.*]] = zext <16 x i8> [[TMP1]] to <16 x i32>
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP2]])
; CHECK-NEXT: ret i32 [[TMP3]]
;
entry:
%wide.load = load <16 x i8>, ptr %b, align 1
br label %vector.body

vector.body:
%a.phi = phi <16 x i32> [ %a, %entry ]
%wide.load.phi = phi <16 x i8> [ %wide.load, %entry ]
%0 = zext <16 x i8> %wide.load.phi to <16 x i32>
%1 = and <16 x i32> %0, %a.phi
%2 = tail call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %1)
ret i32 %2
}

declare i32 @llvm.vector.reduce.add.v16i32(<16 x i32>)
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