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[RISCV] Use RVInst16CB for C_SRLI64_HINT and C_SRAI64_HINT. #112250

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Merged
merged 1 commit into from
Oct 14, 2024
Merged

[RISCV] Use RVInst16CB for C_SRLI64_HINT and C_SRAI64_HINT. #112250

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20 changes: 10 additions & 10 deletions llvm/lib/Target/RISCV/RISCVInstrInfoC.td
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Original file line number Diff line number Diff line change
Expand Up @@ -705,23 +705,23 @@ def C_SLLI64_HINT : RVInst16CI<0b000, 0b10, (outs GPR:$rd_wb), (ins GPR:$rd),
let Inst{12} = 0;
}

def C_SRLI64_HINT : RVInst16CI<0b100, 0b01, (outs GPRC:$rd_wb),
(ins GPRC:$rd),
"c.srli64", "$rd">,
def C_SRLI64_HINT : RVInst16CB<0b100, 0b01, (outs GPRC:$rs1_wb),
(ins GPRC:$rs1),
"c.srli64", "$rs1">,
Sched<[WriteShiftImm, ReadShiftImm]> {
let Constraints = "$rd = $rd_wb";
let Constraints = "$rs1 = $rs1_wb";
let Inst{6-2} = 0;
let Inst{11-10} = 0;
let Inst{11-10} = 0b00;
let Inst{12} = 0;
}

def C_SRAI64_HINT : RVInst16CI<0b100, 0b01, (outs GPRC:$rd_wb),
(ins GPRC:$rd),
"c.srai64", "$rd">,
def C_SRAI64_HINT : RVInst16CB<0b100, 0b01, (outs GPRC:$rs1_wb),
(ins GPRC:$rs1),
"c.srai64", "$rs1">,
Sched<[WriteShiftImm, ReadShiftImm]> {
let Constraints = "$rd = $rd_wb";
let Constraints = "$rs1 = $rs1_wb";
let Inst{6-2} = 0;
let Inst{11-10} = 1;
let Inst{11-10} = 0b01;
let Inst{12} = 0;
}

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