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[mlir][linalg] Fix idx comparison in the vectorizer #112900

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Oct 18, 2024
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3 changes: 2 additions & 1 deletion mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -863,9 +863,10 @@ static uint64_t getTrailingNonUnitLoopDimIdx(LinalgOp linalgOp) {
llvm::count_if(loopRanges, [](int64_t dim) { return dim != 1; }) == 1) &&
"For statically shaped Linalg Ops, only one "
"non-unit loop dim is expected");
assert(loopRanges.size() != 0 && "Empty loops, nothing to analyse.");

size_t idx = loopRanges.size() - 1;
for (; idx >= 0; idx--)
for (; idx != 0; idx--)
if (loopRanges[idx] != 1)
break;

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27 changes: 27 additions & 0 deletions mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,33 @@ module attributes {transform.with_named_sequence} {
}
}

// -----

#map = affine_map<() -> ()>
func.func @negative_no_loops(%arg0: tensor<f32>, %arg1: tensor<f32>) -> tensor<f32> {
%1 = linalg.generic {
indexing_maps = [#map],
iterator_types = []
} outs(%arg1 : tensor<f32>) {
^bb0(%arg4: f32):
%2 = tensor.extract %arg0[] : tensor<f32>
linalg.yield %2 : f32
} -> tensor<f32>
return %1 : tensor<f32>
}
// CHECK-LABEL: func.func @negative_no_loops
// CHECK: tensor.extract

module attributes {transform.with_named_sequence} {
transform.named_sequence @__transform_main(%arg1: !transform.any_op {transform.readonly}) {
%0 = transform.structured.match ops{["linalg.generic"]} in %arg1 : (!transform.any_op) -> !transform.any_op
%1 = transform.get_parent_op %0 {isolated_from_above} : (!transform.any_op) -> !transform.any_op
%2 = transform.structured.vectorize_children_and_apply_patterns %1 : (!transform.any_op) -> !transform.any_op
transform.yield
}
}


// -----

#map = affine_map<(d0, d1, d2) -> (d0, d1, d2)>
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