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[X86][MC] Add R_X86_64_CODE_6_GOTTPOFF #117277

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Merged
merged 2 commits into from
Nov 25, 2024
Merged

[X86][MC] Add R_X86_64_CODE_6_GOTTPOFF #117277

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a5001d2
[X86][MC] Add R_X86_64_CODE_6_GOTTPOFF
fzou1 Nov 22, 2024
1593c41
Add ADD64rm_NF.
fzou1 Nov 22, 2024
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1 change: 1 addition & 0 deletions llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
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Expand Up @@ -46,3 +46,4 @@ ELF_RELOC(R_X86_64_REX_GOTPCRELX, 42)
ELF_RELOC(R_X86_64_CODE_4_GOTPCRELX, 43)
ELF_RELOC(R_X86_64_CODE_4_GOTTPOFF, 44)
ELF_RELOC(R_X86_64_CODE_4_GOTPC32_TLSDESC, 45)
ELF_RELOC(R_X86_64_CODE_6_GOTTPOFF, 50)
2 changes: 2 additions & 0 deletions llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
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Expand Up @@ -634,6 +634,7 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
{"reloc_riprel_4byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
{"reloc_riprel_4byte_relax_rex", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
{"reloc_riprel_4byte_relax_rex2", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
{"reloc_riprel_6byte_relax", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
{"reloc_signed_4byte", 0, 32, 0},
{"reloc_signed_4byte_relax", 0, 32, 0},
{"reloc_global_offset_table", 0, 32, 0},
Expand Down Expand Up @@ -683,6 +684,7 @@ static unsigned getFixupKindSize(unsigned Kind) {
case X86::reloc_riprel_4byte_relax_rex2:
case X86::reloc_riprel_4byte_movq_load:
case X86::reloc_riprel_4byte_movq_load_rex2:
case X86::reloc_riprel_6byte_relax:
case X86::reloc_signed_4byte:
case X86::reloc_signed_4byte_relax:
case X86::reloc_global_offset_table:
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
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Expand Up @@ -77,6 +77,7 @@ static X86_64RelType getType64(MCFixupKind Kind,
case X86::reloc_riprel_4byte_relax_rex2:
case X86::reloc_riprel_4byte_movq_load:
case X86::reloc_riprel_4byte_movq_load_rex2:
case X86::reloc_riprel_6byte_relax:
return RT64_32;
case X86::reloc_branch_4byte_pcrel:
Modifier = MCSymbolRefExpr::VK_PLT;
Expand Down Expand Up @@ -202,6 +203,8 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
if ((unsigned)Kind == X86::reloc_riprel_4byte_movq_load_rex2 ||
(unsigned)Kind == X86::reloc_riprel_4byte_relax_rex2)
return ELF::R_X86_64_CODE_4_GOTTPOFF;
else if ((unsigned)Kind == X86::reloc_riprel_6byte_relax)
return ELF::R_X86_64_CODE_6_GOTTPOFF;
return ELF::R_X86_64_GOTTPOFF;
case MCSymbolRefExpr::VK_TLSLD:
checkIs32(Ctx, Loc, Type);
Expand All @@ -227,6 +230,8 @@ static unsigned getRelocType64(MCContext &Ctx, SMLoc Loc,
case X86::reloc_riprel_4byte_relax_rex2:
case X86::reloc_riprel_4byte_movq_load_rex2:
return ELF::R_X86_64_CODE_4_GOTPCRELX;
case X86::reloc_riprel_6byte_relax:
return ELF::R_X86_64_CODE_6_GOTTPOFF;
}
llvm_unreachable("unexpected relocation type!");
case MCSymbolRefExpr::VK_GOTPCREL_NORELAX:
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
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Expand Up @@ -24,6 +24,8 @@ enum Fixups {
// instruction with rex prefix
reloc_riprel_4byte_relax_rex2, // 32-bit rip-relative in relaxable
// instruction with rex2 prefix
reloc_riprel_6byte_relax, // 32-bit rip-relative in relaxable
// instruction with APX NDD
reloc_signed_4byte, // 32-bit signed. Unlike FK_Data_4
// this will be sign extended at
// runtime.
Expand Down
10 changes: 9 additions & 1 deletion llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
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Expand Up @@ -579,7 +579,9 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
// this needs to be a GOTPC32 relocation.
if (startsWithGlobalOffsetTable(Expr) != GOT_None)
FixupKind = MCFixupKind(X86::reloc_global_offset_table);
}
} else if (FixupKind == MCFixupKind(X86::reloc_riprel_6byte_relax))
ImmOffset -= 6;

if (FixupKind == FK_PCRel_2)
ImmOffset -= 2;
if (FixupKind == FK_PCRel_1)
Expand Down Expand Up @@ -670,6 +672,12 @@ void X86MCCodeEmitter::emitMemModRMByte(
return Kind == REX2 ? X86::reloc_riprel_4byte_relax_rex2
: Kind == REX ? X86::reloc_riprel_4byte_relax_rex
: X86::reloc_riprel_4byte_relax;
case X86::ADD64rm_NF:
case X86::ADD64rm_ND:
case X86::ADD64mr_ND:
case X86::ADD64mr_NF_ND:
case X86::ADD64rm_NF_ND:
return X86::reloc_riprel_6byte_relax;
Comment on lines +676 to +680
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You need to consider ADD64rm_NF too.

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Added.

}
}();

Expand Down
4 changes: 3 additions & 1 deletion llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
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Expand Up @@ -69,7 +69,8 @@ static bool isFixupKindRIPRel(unsigned Kind) {
Kind == X86::reloc_riprel_4byte_movq_load_rex2 ||
Kind == X86::reloc_riprel_4byte_relax ||
Kind == X86::reloc_riprel_4byte_relax_rex ||
Kind == X86::reloc_riprel_4byte_relax_rex2;
Kind == X86::reloc_riprel_4byte_relax_rex2 ||
Kind == X86::reloc_riprel_6byte_relax;
}

static unsigned getFixupKindLog2Size(unsigned Kind) {
Expand All @@ -91,6 +92,7 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
case X86::reloc_signed_4byte:
case X86::reloc_signed_4byte_relax:
case X86::reloc_branch_4byte_pcrel:
case X86::reloc_riprel_6byte_relax:
case FK_Data_4: return 2;
case FK_Data_8: return 3;
}
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
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Expand Up @@ -70,6 +70,7 @@ unsigned X86WinCOFFObjectWriter::getRelocType(MCContext &Ctx,
case X86::reloc_riprel_4byte_relax:
case X86::reloc_riprel_4byte_relax_rex:
case X86::reloc_riprel_4byte_relax_rex2:
case X86::reloc_riprel_6byte_relax:
case X86::reloc_branch_4byte_pcrel:
return COFF::IMAGE_REL_AMD64_REL32;
case FK_Data_4:
Expand Down
76 changes: 45 additions & 31 deletions llvm/test/MC/ELF/relocation.s
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Expand Up @@ -21,6 +21,15 @@ bar:
leaq foo@GOTTPOFF(%rip), %rax # R_X86_64_GOTTPOFF
movq foo@GOTTPOFF(%rip), %r31 # R_X86_64_CODE_4_GOTTPOFF
addq foo@GOTTPOFF(%rip), %r31 # R_X86_64_CODE_4_GOTTPOFF
# NDD
addq %r8, foo@GOTTPOFF(%rip), %r16 # R_X86_64_CODE_6_GOTTPOFF
addq foo@GOTTPOFF(%rip), %rax, %r12 # R_X86_64_CODE_6_GOTTPOFF
# NDD + NF
{nf} addq %r8, foo@GOTTPOFF(%rip), %r16 # R_X86_64_CODE_6_GOTTPOFF
{nf} addq foo@GOTTPOFF(%rip), %rax, %r12 # R_X86_64_CODE_6_GOTTPOFF
# NF
{nf} addq foo@GOTTPOFF(%rip), %r12 # R_X86_64_CODE_6_GOTTPOFF

leaq foo@TLSGD(%rip), %rax # R_X86_64_TLSGD
leaq foo@TPOFF(%rax), %rax # R_X86_64_TPOFF32
leaq foo@TLSLD(%rip), %rdi # R_X86_64_TLSLD
Expand Down Expand Up @@ -81,37 +90,42 @@ weak_sym:
// CHECK-NEXT: 0x2D R_X86_64_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x35 R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x3D R_X86_64_CODE_4_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x44 R_X86_64_TLSGD foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x4B R_X86_64_TPOFF32 foo 0x0
// CHECK-NEXT: 0x52 R_X86_64_TLSLD foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x59 R_X86_64_DTPOFF32 foo 0x0
// CHECK-NEXT: 0x5F R_X86_64_GOT64 foo 0x0
// CHECK-NEXT: 0x69 R_X86_64_GOTOFF64 foo 0x0
// CHECK-NEXT: 0x72 R_X86_64_32S .text 0x0
// CHECK-NEXT: 0x79 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x80 R_X86_64_PC32 foo 0x80
// CHECK-NEXT: 0x87 R_X86_64_32S .text 0x0
// CHECK-NEXT: 0x8B R_X86_64_DTPOFF64 foo 0x0
// CHECK-NEXT: 0x95 R_X86_64_TPOFF64 baz 0x0
// CHECK-NEXT: 0x9D R_X86_64_PC16 foo 0x9D
// CHECK-NEXT: 0x9F R_X86_64_PC8 foo 0x9F
// CHECK-NEXT: 0xA1 R_X86_64_PLT32 foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0xA8 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFB
// CHECK-NEXT: 0xAF R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x3
// CHECK-NEXT: 0xB6 R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0xBB R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x1
// CHECK-NEXT: 0xC1 R_X86_64_GOTPC64 _GLOBAL_OFFSET_TABLE_ 0x2
// CHECK-NEXT: 0xC9 R_X86_64_SIZE64 blah 0x0
// CHECK-NEXT: 0xD1 R_X86_64_SIZE64 blah 0x20
// CHECK-NEXT: 0xD9 R_X86_64_SIZE64 blah 0xFFFFFFFFFFFFFFE0
// CHECK-NEXT: 0xE4 R_X86_64_SIZE32 blah 0x0
// CHECK-NEXT: 0xEB R_X86_64_SIZE32 blah 0x20
// CHECK-NEXT: 0xF2 R_X86_64_SIZE32 blah 0xFFFFFFFFFFFFFFE0
// CHECK-NEXT: 0xF6 R_X86_64_GOTPCREL foo 0x0
// CHECK-NEXT: 0xFA R_X86_64_PLT32 foo 0x0
// CHECK-NEXT: 0x10E R_X86_64_32 .text 0x10E
// CHECK-NEXT: 0x113 R_X86_64_PC16 pr23771 0xFFFFFFFFFFFFFFFE
// CHECK-NEXT: 0x115 R_X86_64_PC32 pr23272 0x0
// CHECK-NEXT: 0x47 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
// CHECK-NEXT: 0x51 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
// CHECK-NEXT: 0x5B R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
// CHECK-NEXT: 0x65 R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
// CHECK-NEXT: 0x6F R_X86_64_CODE_6_GOTTPOFF foo 0xFFFFFFFFFFFFFFFA
// CHECK-NEXT: 0x76 R_X86_64_TLSGD foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x7D R_X86_64_TPOFF32 foo 0x0
// CHECK-NEXT: 0x84 R_X86_64_TLSLD foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x8B R_X86_64_DTPOFF32 foo 0x0
// CHECK-NEXT: 0x91 R_X86_64_GOT64 foo 0x0
// CHECK-NEXT: 0x9B R_X86_64_GOTOFF64 foo 0x0
// CHECK-NEXT: 0xA4 R_X86_64_32S .text 0x0
// CHECK-NEXT: 0xAB R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0xB2 R_X86_64_PC32 foo 0xB2
// CHECK-NEXT: 0xB9 R_X86_64_32S .text 0x0
// CHECK-NEXT: 0xBD R_X86_64_DTPOFF64 foo 0x0
// CHECK-NEXT: 0xC7 R_X86_64_TPOFF64 baz 0x0
// CHECK-NEXT: 0xCF R_X86_64_PC16 foo 0xCF
// CHECK-NEXT: 0xD1 R_X86_64_PC8 foo 0xD1
// CHECK-NEXT: 0xD3 R_X86_64_PLT32 foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0xDA R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFB
// CHECK-NEXT: 0xE1 R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x3
// CHECK-NEXT: 0xE8 R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0xED R_X86_64_GOTPC32 _GLOBAL_OFFSET_TABLE_ 0x1
// CHECK-NEXT: 0xF3 R_X86_64_GOTPC64 _GLOBAL_OFFSET_TABLE_ 0x2
// CHECK-NEXT: 0xFB R_X86_64_SIZE64 blah 0x0
// CHECK-NEXT: 0x103 R_X86_64_SIZE64 blah 0x20
// CHECK-NEXT: 0x10B R_X86_64_SIZE64 blah 0xFFFFFFFFFFFFFFE0
// CHECK-NEXT: 0x116 R_X86_64_SIZE32 blah 0x0
// CHECK-NEXT: 0x11D R_X86_64_SIZE32 blah 0x20
// CHECK-NEXT: 0x124 R_X86_64_SIZE32 blah 0xFFFFFFFFFFFFFFE0
// CHECK-NEXT: 0x128 R_X86_64_GOTPCREL foo 0x0
// CHECK-NEXT: 0x12C R_X86_64_PLT32 foo 0x0
// CHECK-NEXT: 0x140 R_X86_64_32 .text 0x140
// CHECK-NEXT: 0x145 R_X86_64_PC16 pr23771 0xFFFFFFFFFFFFFFFE
// CHECK-NEXT: 0x147 R_X86_64_PC32 pr23272 0x0
// CHECK-NEXT: ]
// CHECK-NEXT: }

Expand Down
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